LT1684
Micropower
Ring Tone Generator
FEATURES
s
s
DESCRIPTIO
s
s
s
s
s
s
s
s
s
Allows Dynamic Control of Output Frequency,
Cadence, Amplitude and DC Offset
Active Tracking Supply Configuration Allows Linear
Generation of Ring Tone Signal
No High Voltage Post-Filtering Required
Capacitive Isolation Eliminates Optocouplers
Low Distortion Output Meets International
PTT Requirements
Differential Input Signal for Noise Immunity
User Adjustable Active Output Current Limit
Powered Directly From High Voltage Ringer
Supply—No Additional Supplies Necessary
Supply Current: < 1mA
2% Signal Amplitude Reference
Available in 14-Pin SO and DIP Packages
The LT
®
1684 is a telecommunication ring tone generator.
The IC takes a user-generated pulse width modulated
(PWM) input and converts it to a high voltage sine wave
suitable for telephone ringing applications.
The LT1684 receives capacitor-isolated differential PWM
input signals encoded with desired ring output cadence,
frequency, and amplitude information. The LT1684 nor-
malizes the pulse amplitude to
±1.25V
for an accurate
signal voltage reference. The cadence, frequency and
amplitude information is extracted using a multiple-
pole active filter/amplifier, producing the output ring tone
signal.
The LT1684 uses its own ring tone output as a reference
for generating local supply rails using complementary
high voltage external MOSFETs as dynamic level-shifting
devices. This “active tracking” supply mode of operation
allows linear generation of the high voltage ring tone
signal, reducing the need for large high voltage filtering
elements.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s
s
s
Wireless Local Loop Telephones
Key System/PBX Equipment
Fiber to the Curb Telecom Equipment
TYPICAL APPLICATIO
PWM
CONTROLLER
P1
µC
P2
DC
ISOLATION
100pF
Electrically Isolated Ring Tone Generator
100V
6.8nF
IN A
10k
IN B
LT1684
LIM
+
OUT
AT
REF
COMP1
GATE
+
FB1
V
+
1N4001
100Ω
100k
IRF610
10k
100pF
100pF
0.1µF
BG
OUT
3k
2k
300k
1µF
5k
AMPIN
4700pF
20pF
COMP2
LIM
–
V
–
GATE
–
6.8nF
1N5817
100Ω
IRF9610
100k
–100V
FB1: FERRONICS FMB1601
(716) 388-1020
U
+
RING TONE
OUTPUT
U
U
–
(
±100mA
CAPABILITY
)
1684 TA01
1
LT1684
ABSOLUTE
AXI U
RATI GS
Voltages:
Active Tracking Differential Voltage
(GATE
+
– GATE
–
) ..................................– 0.3V to 42V
Local Supply Differential Voltage
(V
+
– V
–
) ...............................................– 0.3V to 36V
Local Supply
Voltage V
+ ..............
(GATE
+
– 7.0V) to (GATE
+
+ 0.3V)
Local Supply
Voltage V
– ..............
(GATE
–
– 0.3V) to (GATE
–
+ 7.0V)
PWM Input Differential Voltage
(IN A – IN B) .........................................– 7.0V to 7.0V
PWM Input Voltage
Common Mode ................. (V
–
– 0.3V) to (V
+
+ 0.3V)
LIM
+
Current Limit
Pin Voltage ..................... (OUT – 0.3V) to (V
+
+ 0.3V)
LIM
–
Current Limit
Pin Voltage .................... (V
–
– 0.3V) to (OUT + 0.3V)
All Other Pin Voltages ........... (V
–
– 0.3V) to (V
+
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
TOP VIEW
IN B
COMP1
COMP2
LIM
–
V
–
GATE
–
AT
REF
1
2
3
4
5
6
7
14 IN A
13 BG
OUT
12 AMPIN
11
GATE
+
LIM
+
OUT
10 V
+
9
8
N PACKAGE
14-LEAD PDIP
S PACKAGE
14-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 75°C/W (N)
T
JMAX
= 125°C,
θ
JA
= 115°C/W (S)
Consult factory for Military grade parts.
2
U
U
W
W W
U
W
(Note 1)
Currents:
LIM
+
, LIM
–
Current .......................................... – 350mA
OUT Current ....................................................... 350mA
BG
OUT
Current ....................................................
±10mA
PWM (IN A, IN B) Current ....................................
±5mA
GATE
+
, GATE
–
Current .......................................
±20mA
COMP1 Current ....................................................
±1mA
COMP2 Current ....................................................
±1mA
AT
REF
Current .....................................................
±20mA
Temperatures:
Operating Junction Temperature Range
Commercial Grade ................................. 0°C to 125°C
Industrial Grade ................................ – 40°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LT1684CN
LT1684CS
LT1684IN
LT1684IS
LT1684
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
– V
–
= 20V, Voltages referenced to pin OUT, V
OUT
= V
ATREF
unless otherwise noted.
SYMBOL
I
S
|V
+
|
|V
–
|
V
GATE
+
V
GATE
–
PARAMETER
DC Supply Current (Note 2)
Local Supply Voltages
Active Tracking Supply FET
Bias Voltage
Active Tracking Supply FET
Bias Voltage
Input Carrier Frequency
Minimum Valid Differential Input
Differential Input Threshold
| IN A – IN B |
R
IN
R
INA,INB
BG Buffer
V
BGOUT
V
BGOUTOS
I
BGOUTSC
R
BGOUT
t
r
t
f
∆t
r-f
t
pr
t
pf
∆t
p
BG
OUT
Normalized Voltage
Output Offset Voltage
[(V
BGOUT
+) + (V
BGOUT
–)]/2
BG
OUT
Short-Circuit Current
BG
OUT
Output Impedance
BG
OUT
Rise Time (10% to 90%)
BG
OUT
Fall Time (10% to 90%)
BG
OUT
RiseTime – Fall Time
BG
OUT
Propagation Delay PWM Input
Transition to 10% Output (Rising Edge)
BG
OUT
Propagation Delay PWM Input
Transition to 90% Output (Falling Edge)
BG
OUT
Propagation Delay
Rising Edge – Falling Edge
OUT Offset Voltage
OUT Output Impedance
OUT Short-Circuit Current
V
AMPIN
= 0v, I
OUT
= 0A
R
AMPIN
= 10k (Note 4)
–10mA
≥
I
LIM
+
≥
–100mA, LIM
+
Shorted to OUT
10mA
≤
I
OUT
≤
100mA, LIM
–
Shorted to V
–
LIM
+
Shorted to OUT
LIM
–
Shorted to V
–
q
CONDITIONS
IN A – IN B
≥
1.6V
V
GATE
+
V
GATE
–
≥
V
+
≤
V
–
q
q
q
q
MIN
TYP
680
MAX
950
UNITS
µA
V
Supply and Protection
6.5
13.2
–14.8
10
14.0
–14.0
14.8
–13.2
I
GATE
+ = –100µA,
AT
REF
= 0V
I
GATE
– = 100µA,
AT
REF
= 0V
V
V
PWM Receiver
f
PWM
V
IN
10
IN A – IN B or IN B – IN A
q
q
kHz
V
1.00
V
kΩ
kΩ
1.6
0.50
7
50
0.70
10
Differential Input Overdrive Impedance
(Note 3, 5)
Single-Ended Input Impedance
(Note 5)
V
IN
> V
TH
+ 100mV
To Pin OUT
q
q
Magnitude |V
BGOUT
|
q
q
q
1.235
1.225
–7
–10
±2
1.250
1.250
1.265
1.275
7
10
V
V
mV
mV
mA
Ω
±4.5
0.2
160
260
300
400
0
500
600
100
– 2mA
≤
I
BGOUT
≤
2mA
R
OUT
= 5k, C
OUT
= 10pF
R
OUT
= 5k, C
OUT
= 10pF
R
OUT
= 5k, C
OUT
= 10pF
R
OUT
= 5k, C
OUT
= 10pF
q
q
q
q
q
q
ns
ns
ns
ns
ns
ns
– 200
–100
340
440
– 200
–100
Output Amplifier
V
OUTOS
R
OUT
I
OUTSC
q
–6
–8
0.01
0.15
±100
±190
6
8
mV
mV
Ω
Ω
mA
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2:
IC Supply current specification represents unloaded condition and
does not include external FET gate pull up/down currents (GATE
+
, GATE
–
pins). Actual total IC bias currents will be higher and vary with operating
conditions. See Applications Information.
Note 3:
PWM inputs are high impedance through
±100mV
beyond the
input thresholds.
Note 4:
10k resistor from pin AMPIN to ground.
Note 5:
Guaranteed but not tested.
3
LT1684
TYPICAL PERFOR A CE CHARACTERISTICS
DC Supply Current vs V
+
– V
–
740
720
T
J
= 25°C
710
690
IN A – IN B
≥
1.6V
V
GATE
– V
ATREF
(V)
DC SUPPLY CURRENT (µA)
DC SUPPLY CURRENT (µA)
700
IN A – IN B
≥
1.6V
680
660
640
620
600
14
16
18
20
V
+
– V
–
(V)
22
24
1684 G01
IN A – IN B
≤
–1.6V
V
GATE
– V
ATREF
Voltage
Magnitudes vs Temperature
14.5
14.4
14.3
I
GATE
= 1mA
0.85
0.80
0.75
V
GATE
– V
ATREF
(V)
IN
A – IN B (V)
14.2
14.1
14.0
13.9
13.8
13.7
13.6
13.5
– 50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
0.70
0.65
0.60
0.55
0.50
0.45
– 50
V
BGOUT
(V)
PWM Buffer (Pin BG
OUT
) Current
Limit vs Temperature
6.0
250
225
200
175
150
125
PWM BUFFER CURRENT LIMIT (mA)
5.5
OUTPUT CURRENT LIMIT (mA)
OUTPUT CURRENT LIMIT (mA)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
– 50
–25
0
25
50
75
TEMPERATURE (°C)
4
U W
100
DC Supply Current vs Temperature
14.3
V
GATE
– V
ATREF
Voltage
Magnitudes vs I
GATE
T
J
= 25°C
14.2
670
650
630
610
590
570
550
–50
IN A – IN B
≤
–1.6V
14.1
14.0
13.9
–25
0
25
50
75
TEMPERATURE (°C)
100
125
13.8
0.1
0.3
1.0
I
GATE
(mA)
3.0
10.0
1684 G03
1684 G02
PWM Input Thresholds vs
Temperature
1.253
1.252
1.251
1.250
1.249
1.248
1.247
1.246
V
BGOUT
Magnitude vs Temperature
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1.245
– 50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1684 G04
1684 G05
1684 G06
Output Amplifier Current Limit vs
Temperature (R
LIM
= 0Ω)
200
Output Amplifier Current Limit vs
External Limiting Resistor Values
150
100
TYPICAL (T
J
= 25°C)
50
MINIMUM (T
J
= 125°C)
0
125
100
– 50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
0
1
2
3
4 5 6
R
LIM
(Ω)
7
8
9
10
1684 G07
1684 G08
1684 G09
LT1684
PI FU CTIO S
IN B (Pin 1):
PWM Negative Input. Input is isolated from
digital source by ~100pF series capacitor. A 10k resistor
can be connected to the IN B pin in series with the isolation
capacitor for transient protection. The PWM receiver imple-
ments a diode forward drop of input hysteresis (relative to
IN A). This hysteresis and internal signal limiting assure
common mode glitch rejection with isolation capacitor
mismatches up to 2:1. For maximum performance, how-
ever, effort should be made to match the two PWM input
isolation capacitors. Pin IN B is differentially clamped to
pin IN A through back-to-back diodes. This results in a
high impedance differential input through
±100mV
be-
yond the input thresholds. 5k internal input resistors yield
a 10k (nominal) differential overdrive impedance.
COMP1 (Pin 2):
Output Amplifier Primary Compensation.
Connect a 100pF capacitor from pin COMP1 to pin OUT.
COMP2 (Pin 3):
Output Amplifier Secondary Compensa-
tion. Connect a 20pF capacitor from pin COMP2 to pin
OUT.
LIM
–
(Pin 4):
Output Amplifier Current Sink Limit. Pin
implements I
OUT
• R = V
BE
current clamp. Internal clamp
resistor has a typical value of 3.5Ω. For maximum current
drive capability (190mA typical) short pin to pin V
–
.
Reduction of current sink capability is achieved by placing
additional resistance from pin LIM
–
to pin V
–
. (i.e. An
external 3.5Ω resistance from pin LIM
–
to pin V
–
will
reduce the current sinking capability of the output ampli-
fier by approximately 50%.)
V
–
(Pin 5):
Local Negative Supply. Typically connected to
the source of the active tracking supply P-channel MOSFET.
V
–
rail voltage is GATE
–
self-bias voltage less the MOSFET
V
GS
. Typical P-channel MOSFET characteristics provide
AT
REF
– V
–
≈
10V.
GATE
–
(Pin 6):
Negative Power Supply FET Gate Drive. Pin
sources current from pull-down resistor to bias gate of
active tracking supply P-channel MOSFET. Self-biases to
a typical value of –14V, referenced to pin AT
REF
. Pull-down
resistor value is determined such that current sourced
from the GATE
–
pin remains greater than 50µA at mini-
mum output signal voltage and less than 10mA at maxi-
mum output signal voltage.
AT
REF
(Pin 7):
Active Tracking Supply Reference. Typi-
cally connected to pin OUT. Pin bias current is the differ-
ence between the magnitudes of GATE
+
pin bias and
GATE
–
pin bias (I
ATREF
=
I
GATE
+ –
I
GATE
–).
OUT (Pin 8):
Ring Tone Output Pin. Output of active filter
amplifier/buffer. Used as reference voltage for internal
functions of IC. Usually shorted to pin AT
REF
to generate
reference for active tracking supply circuitry. Connect a 1A
(1N4001-type) diode between V
+
and OUT and a
1A Schottky diode from V
–
to OUT for line transient
protection.
LIM
+
(Pin 9):
Output Amplifier Current Source Limit. Pin
implements I
OUT
• R = V
BE
current clamp. Internal clamp
resistor has a typical value of 3.5Ω. For maximum current
drive capability (190mA typical) short pin LIM
+
to pin
OUT. Reduction of current source capability is achieved by
placing additional resistance from pin LIM
+
to pin OUT.
(i.e. An external 3.5Ω resistance from pin LIM
+
to pin OUT
will reduce the current sourcing capability of the output
amplifier by approximately 50%.)
V
+
(Pin 10):
Local Positive Supply. Typically connected to
the source of the active tracking supply N-channel MOSFET.
This condition should be made using a ferrite bead.
Operating V
+
rail voltage is GATE
+
self-bias voltage less
the MOSFET V
GS
. Typical N-channel MOSFET characteris-
tics provide V
+
– AT
REF
≈
10V.
GATE
+
(Pin 11):
Positive Power Supply FET Gate Drive.
Pin sinks current from pull-up resistor to bias gate of
active tracking supply N-channel MOSFET. Self-biases to
a typical value of 14V, referenced to pin AT
REF
. Pull-up
resistor value is determined such that sink current into
GATE
+
pin remains greater than 50µA at maximum output
signal voltage and less than 10mA at minimum output
signal voltage.
AMPIN (Pin 12):
Output Amplifier Input. Connected to
external filter components through series protection re-
sistor (usually 5k). Thevenin DC resistance of external
filter and protection components should be 10k for opti-
mum amplifier offset performance. See Applications In-
formation section.
U
U
U
5
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