• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
DESCRIPTION
The SiC47x is a family of wide input voltage, high efficiency
synchronous buck regulators with integrated high side
and low side power MOSFETs. Its power stage is capable
of supplying high continuous current at up to 2 MHz
switching frequency. This regulator produces an adjustable
output voltage down to 0.8 V from 4.5 V to 55 V input
rail to accommodate a variety of applications, including
computing, consumer electronics, telecom, and industrial.
SiC47x’s architecture allows for ultrafast transient response
with minimum output capacitance and tight ripple regulation
at very light load. The device enables loop stability
regardless of the type of output capacitor used, including
low ESR ceramic capacitors. The device also incorporates a
power saving scheme that significantly increases light load
efficiency. The regulator integrates a full protection feature
set, including over current protection (OCP), output
overvoltage protection (OVP), short circuit protection (SCP),
output undervoltage protection (UVP) and over temperature
protection (OTP). It also has UVLO for input rail and a user
programmable soft start.
The SiC47x family is available in 3 A, 5 A, 8 A, 12 A pin
compatible 5 mm by 5 mm lead (Pb)-free power enhanced
MLP55-27L package.
APPLICATIONS
Industrial and automation
Home automation
Industrial and server computing
Networking, telecom, and base station power supplies
Unregulated wall transformer
Robotics
High end hobby electronics: remote control cars, planes,
and drones
• Battery management systems
• Power tools
• Vending, ATM, and slot machines
Axis Title
100
98
V
IN
= 24 V, V
OUT
= 12 V
•
•
•
•
•
•
•
T
YPICAL APPLICATION CIRCUIT
10000
INPUT
4.5 V
DC
to 55 V
DC
C
BOOT
PHASE
SW
V
CIN
V
IN
V
DD
96
2nd line
eff - Efficiency (%)
V
OUT
P
GOOD
BOOT
C
IN
V
DRV
MODE
SS
C
ss
R
limit
R
fsw
I
LIMIT
SiC47x
V
SNS
Cy
Cx
R
up
C
OUT
ULTRASONIC
V
FB
COMP
90
88
86
84
82
80
0
1
2
3
V
IN
= 48 V, V
OUT
= 12 V
V
IN
= 24 V, V
OUT
= 5 V
R
comp
C
comp
R
down
100
V
IN
= 48 V, V
OUT
= 5 V
10
4
5
6
7
8
I
OUT
- Output Current (A)
Fig. 1 - Typical Application Circuit for SiC47x
S18-0939-Rev. C, 17-Sep-2018
Fig. 2 - SiC472 Efficiency vs. Output Current
Document Number: 75786
1
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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www.vishay.com/doc?91000
1st line
2nd line
EN
f
SW
94
92
1000
Rx
P
GND
A
GND
SiC471, SiC472, SiC473, SiC474
www.vishay.com
PIN CONFIGURATION
27 MODE
21 COMP
27 MODE
21 COMP
23 A
GND
Vishay Siliconix
20 V
SNS
23 A
GND
26 V
DD
20 V
SNS
25 I
LIM
22 V
FB
24 f
SW
26 V
DD
25 I
LIM
22 V
FB
24 f
SW
V
CIN
1
P
GOOD
2
EN 3
BOOT 4
PHASE 5
PHASE 6
P
GND
10
P
GND
11
V
IN
7
V
IN
8
P
GND
9
30
VIN
29 PGND
28 AGND
19 SS
18 ULTRASONIC
17 P
GND
16 V
DRV
15 GL
14 SW
13 SW
12 SW
SS 19
ULTRASONIC 18
P
GND
17
V
DRV
16
GL 15
SW 14
SW 13
SW 12
P
GND
9
V
IN
8
P
GND
11
P
GND
10
V
IN
7
30
P
GND
29
V
IN
28
A
GND
1 V
CIN
2 P
GOOD
3 EN
4 BOOT
5 PHASE
6 PHASE
Fig. 3 - SiC47x Pin Configuration
PIN DESCRIPTION
PIN NUMBER
1
2
3
4
5, 6
7, 8, 29
9, 10, 11, 17, 30
12, 13, 14
15
16
18
19
20
21
22
23, 28
24
25
26
27
SYMBOL
V
CIN
P
GOOD
EN
BOOT
PHASE
V
IN
P
GND
SW
GL
V
DRV
ULTRASONIC
SS
V
SNS
COMP
V
FB
A
GND
f
SW
I
LIMIT
V
DD
MODE
DESCRIPTION
Supply voltage for internal regulators V
DD
and V
DRV
. This pin should be tied to V
IN
, but can also be
connected to a lower supply voltage (> 5 V) to reduce losses in the internal linear regulators
Open-drain power good indicator - high impedance indicates power is good. An external pull-up
resistor is required
Enable pin. Tie high/low to enable/disable the IC accordingly. This is a high voltage compatible pin,
can be tied to V
IN
High side driver bootstrap voltage
Return path of high side gate driver
Power stage input voltage. Drain of high side MOSFET
Power ground
Power stage switch node
Low side MOSFET gate signal
Supply voltage for internal gate driver. When using the internal LDO as a bias power supply, V
DRV
is
the LDO output. Connect a 4.7 μF decoupling capacitor to P
GND
Float to disable ultrasonic mode, connect to V
DD
to enable. Depending on the operation mode set by
the mode pin, power save mode or forced continuous mode will be enabled when the ultrasonic
mode is disabled
Set the soft start ramp by connecting a capacitor to A
GND
. An internal current source will charge the
capacitor
Power inductor signal feedback pin for system stability compensation
Output of the internal error amplifier. The feedback loop compensation network is connected from
this pin to the A
GND
pin
Feedback input for switching regulator used to program the output voltage - connect to an external
resistor divider from V
OUT
to A
GND
Analog ground
Set the on-time by connecting a resistor to A
GND
Set the current limit by connecting a resistor to A
GND
Bias supply for the IC. V
DD
is an LDO output, connect a 1 μF decoupling capacitor to A
GND
Set various operation modes by connecting a resistor to A
GND
. See specification table for details
S18-0939-Rev. C, 17-Sep-2018
Document Number: 75786
2
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiC471, SiC472, SiC473, SiC474
www.vishay.com
Vishay Siliconix
PACKAGE
PowerPAK
®
MLP55-27L
Reference board
PowerPAK
®
MLP55-27L
Reference board
PowerPAK
®
PowerPAK
®
MLP55-27L
Reference board
MLP55-27L
Reference board
SiC474
SiC473
SiC472
MARKING CODE
SiC471
ORDERING INFORMATION
PART NUMBER
SiC471ED-T1-GE3
SiC471EVB
SiC472ED-T1-GE3
SiC472EVB
SiC473ED-T1-GE3
SiC473EVB
SiC474ED-T1-GE3
SiC474EVB
PART MARKING INFORMATION
=
pin 1 indicator
part number code
Siliconix
logo
ESD
symbol
assembly factory code
year code
week code
lot code
P/N
LL
FYWW
P/N =
=
=
F
Y
WW
LL
=
=
=
=
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
ELECTRICAL PARAMETER
EN, V
CIN
, V
IN
SW / PHASE
V
DRV
V
DD
SW / PHASE (AC)
BOOT
A
GND
to P
GND
All other pins
Temperature
Junction temperature
Storage temperature
Power Dissipation
Thermal resistance from junction-to-ambient
Thermal resistance from junction-to-case
ESD Protection
Electrostatic discharge protection
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
CONDITIONS
Reference to P
GND
Reference to P
GND
Reference to P
GND
Reference to A
GND
Reference to P
GND
; 100 ns
LIMITS
-0.3 to +60
-0.3 to +60
-0.3 to +6
-0.3 to +6
-10 to +66
-0.3 to V
PHASE
+ V
DRV
-0.3 to +0.3
UNIT
V
Reference to A
GND
T
J
T
STG
-0.3 to V
DD
+ 0.3
-40 to +150
-65 to +150
12
2
°C
°C/W
Human body model, JESD22-A114
Charged device model, JESD22-A101
2000
500
V
S18-0939-Rev. C, 17-Sep-2018
Document Number: 75786
3
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiC471, SiC472, SiC473, SiC474
www.vishay.com
Vishay Siliconix
MIN.
4.5
TYP.
-
-
-
5
5.3
-
-40 to +105
-40 to +125
MAX.
55
55
55
5.25
5.55
0.92 x V
IN
V
UNIT
RECOMMENDED OPERATING CONDITIONS
(all voltages referenced to GND = 0 V)
PARAMETER
Input voltage (V
IN
)
Control input voltage (V
CIN
)
Enable (EN)
Bias supply (V
DD
)
Drive supply voltage (V
DRV
)
Output voltage (V
OUT
)
Temperature
Recommended ambient temperature
Operating junction temperature
°C
(1)
4.5
0
4.75
4.75
0.8
Note
(1)
For input voltages below 5 V, provide a separate supply to V
CIN
of at least 5 V to prevent the internal V
DD
rail UVLO from triggering
ELECTRICAL SPECIFICATIONS
(V
IN
= V
CIN
= 48 V, V
EN
= 5 V, T
J
= -40 °C to +125 °C, unless otherwise stated)
PARAMETER
Power Supplies
V
DD
supply
V
DD
dropout
V
DD
UVLO threshold, rising
V
DD
UVLO hysteresis
Maximum V
DD
current
V
DRV
supply
V
DRV
dropout
Maximum V
DRV
current
V
DRV
UVLO threshold, rising
V
DRV
UVLO hysteresis
Input current
Shutdown current
Controller and Timing
Feedback voltage
V
FB
input bias current
Transconductance
COMP source current
COMP sink current
Minimum on-time
t
ON
accuracy
On-time range
Frequency range
Minimum off-time
Soft start current
Soft start voltage
V
FB
I
FB
g
m
I
COMP_SOURCE
I
COMP_SINK
t
ON_MIN.
t
ON_ACCURACY
t
ON_RANGE
f
sw
t
OFF_MIN.
I
SS
V
SS
When V
OUT
reaches regulation
Ultrasonic mode enabled
Ultrasonic mode disabled
T
J
= 25 °C
T
J
= -40 °C to +125 °C
(1)
SYMBOL
TEST CONDITIONS
V
IN
= V
CIN
= 6 V to 55 V
V
IN
= V
CIN
= 5 V
V
IN
= V
CIN
= 5 V, I
VDD
= 1 mA
MIN.
4.75
4.7
-
4
-
TYP.
5
5
70
4.25
225
-
5.3
5
160
-
4.25
295
235
4
800
800
2
0.3
20
20
90
-
-
-
-
250
5
1.5
MAX.
5.25
-
-
4.5
-
-
5.55
5.2
-
-
4.5
-
325
8
804
808
-
-
-
-
110
10
8000
2000
2000
310
7
-
UNIT
V
DD
V
DD_DROPOUT
V
DD_UVLO
V
DD_UVLO_HYST
I
DD
V
DRV
V
DRV_DROPOUT
V
DRV
V
DRV_UVLO
V
DRV_UVLO_HYST
I
VCIN
I
VCIN_SHDN
V
mV
V
mV
mA
V
mV
mA
V
mV
μA
V
IN
= V
CIN
= 6 V to 55 V
V
IN
= V
CIN
= 6 V to 55 V
V
IN
= V
CIN
= 5 V
V
IN
= V
CIN
= 5 V, I
VDD
= 10 mA
V
IN
= V
CIN
= 6 V to 55 V
3
5.1
4.8
-
50
4
-
Non-switching, V
FB
> 0.8 V
V
EN
= 0 V
-
-
796
792
-
-
15
15
-
-10
110
20
0
190
3
-
m/V
pA
mS
μA
ns
%
ns
kHz
ns
μA
V
S18-0939-Rev. C, 17-Sep-2018
Document Number: 75786
4
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiC471, SiC472, SiC473, SiC474
www.vishay.com
Vishay Siliconix
SYMBOL
TEST CONDITIONS
SiC471 (12 A),
R
ILIM
= 60 k, T
J
= -10 °C to +125 °C
MIN.
TYP.
MAX.
UNIT
ELECTRICAL SPECIFICATIONS
(V
IN
= V
CIN
= 48 V, V
EN
= 5 V, T
J
= -40 °C to +125 °C, unless otherwise stated)
PARAMETER
Fault Protections
12
8
5.6
4
-
-
-
-
-
-
-
-
15
-
-
-
-
2
-
3.75
Power save mode enabled, V
DD
, V
DRV
Pre-reg on
Power save mode disabled, V
DD
, V
DRV
Pre-reg on
Power save mode disabled, V
DRV
Pre-reg
off, V
DD
Pre-reg on, provide external V
DRV
Power save mode enabled, V
DRV
Pre-reg off,
V
DD
Pre-reg on, provide external V
DRV
0
298
494
900
15
10
7
5
20
-80
150
35
20
-10
50
7.5
25
1.35
1.2
0.15
5
-
-
5
2
301
499
1000
18
12
A
8.4
6
-
-
-
-
-
-
-
15
35
-
-
-
-
-
0.8
6.25
100
304
k
504
1100
M
V
μA
V
%
°C
Valley current limit
I
OCP
SiC472 (8 A),
R
ILIM
= 60 k, T
J
= -10 °C to +125 °C
SiC473 (5 A),
R
ILIM
= 43 k, T
J
= -10 °C to +125 °C
(2)
SiC474 (3 A),
R
ILIM
= 60 k, T
J
= -10 °C to +125 °C
Output OVP threshold
Output UVP threshold
Over temperature protection
Power Good
Power good output threshold
Power good hysteresis
Power good on resistance
Power good delay time
EN / MODE / Ultrasonic Threshold
EN logic high level
EN logic low level
EN hysteresis
EN pull down resistance
Ultrasonic mode high Level
Ultrasonic mode low level
Mode pull up current
Mode 1
Mode 2
V
OVP
V
UVP
T
OTP_RISING
T
OTP_HYST
V
FB_RISING_VTH_OV
V
FB_FALLING_VTH_UV
V
FB_HYST
R
ON_PGOOD
t
DLY_PGOOD
V
EN_H
V
EN_L
V
HYST
R
EN
V
ULTRASONIC_H
V
ULTRASONIC_L
I
MODE
V
FB
with respect to 0.8 V reference
Rising temperature
Hysteresis
V
FB
rising above 0.8 V reference
V
FB
falling below 0.8 V reference
%
mV
μs
R
MODE
Mode 3
Mode 4
Notes
(1)
Guaranteed by design
(2)
Guaranteed by design for SiC473 OCP measurements
S18-0939-Rev. C, 17-Sep-2018
Document Number: 75786
5
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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