ATSAMA5D26C-CU datasheet, PDF - EEWORLD Datasheet

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ATSAMA5D26C-CU: DescriptionMicroprocessor - MPU BGA GRN IND MRLC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size18MB，3029 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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Microprocessor - MPU BGA GRN IND MRLC

ATSAMA5D26C-CU Parametric

Parameter Name	Attribute value
Maker	Microchip
package instruction	LFBGA-289
Reach Compliance Code	compliant
Factory Lead Time	8 weeks
Address bus width	26
bit size	32
boundary scan	YES
maximum clock frequency	24 MHz
External data bus width	32
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B289
length	14 mm
low power mode	YES
Number of DMA channels	51
Number of external interrupt devices	125
Number of terminals	289
On-chip data RAM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA289,17X17,32
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
RAM (number of words)	131072
Maximum seat height	1.4 mm
speed	500 MHz
Maximum supply voltage	1.32 V
Minimum supply voltage	1.1 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

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SAMA5D2 Series

Ultra-Low-Power Arm® Cortex®-A5 Core-Based MPU,

500 MHz, Graphics Interface, Ethernet 10/100, CAN, USB,

PCI 5.0 Pre-Certified

Introduction

The SAMA5D2 series is a high-performance, ultra-low-power Arm Cortex-A5 CPU-based embedded

microprocessor (MPU) running up to 500 MHz, with support for multiple memories such as DDR2,

DDR3L, LPDDR2, LPDDR3, and QSPI and e.MMC Flash. The devices integrate powerful peripherals for

connectivity and user interface applications, and offer advanced security functions (Arm TrustZone ,

tamper detection, secure data storage, etc.), as well as high-performance crypto accelerators AES, SHA

and TRNG.

Selected members of the SAMA5D2 series are qualified for extended industrial temperature range

operation (-40°C to 105°C external temperature).

The SAMA5D2 series is delivered with a free Linux distribution and bare metal C examples.

Features

•

Arm Cortex-A5 Core

– Armv7-A architecture

– Arm TrustZone

™

– NEON Media Processing Engine

– Up to 500 MHz

– ETM/ETB 8 Kbytes

Memory Architecture

– Memory Management Unit (MMU)

– 32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache

– 128-Kbyte L2 cache configurable to be used as an internal SRAM

– One 128-Kbyte scrambled internal SRAM

One 160-Kbyte internal ROM

• 64-Kbyte scrambled and maskable ROM embedding bootloader/Secure bootloader

• 96-Kbyte unscrambled, unmaskable ROM for NAND Flash BCH ECC table

– High-bandwidth scramblable 16-bit or 32-bit Double Data Rate (DDR) multiport dynamic RAM

controller supporting up to 512 Mbytes 8-bank DDR2/DDR3 (DLL off only) / DDR3L (DLL off

only) / LPDDR1/LPDDR2/LPDDR3, including “on-the-fly” encryption/decryption path

– 8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC)

System Running up to 166 MHz in Typical Conditions

–

•

2018 Microchip Technology Inc.

Datasheet Complete

DS60001476C-page 1

SAMA5D2 Series

Description

The SAMA5D2 Series is a high-performance, power-efficient embedded MPU based on the Arm Cortex-

A5 processor. It integrates the Arm NEON SIMD engine for accelerated multimedia and signal

processing, a configurable 128-Kbyte L2 cache and a floating point unit (FPU) for high-precision

computing. The device features an advanced user interface and connectivity peripherals. Advanced

security is provided by powerful cryptographic accelerators, by the Arm TrustZone technology securing

access to memories and sensitive peripherals, and by several hardware features that safeguard memory

content, authenticate software, detect physical attacks and prevent information leakage during code

execution.

The SAMA5D2 features an internal multilayer bus architecture associated with 2 x 16 DMA channels and

dedicated DMAs for the communication and interface peripherals required to ensure uninterrupted data

transfers with minimal processor overhead. The device supports DDR2, DDR3, DDR3L, LPDDR1,

LPDDR2, LPDDR3, QSPI and e.MMC Flash, and SLC/MLC parallel NAND Flash memory up to 32-bit

ECC.

The comprehensive peripheral set includes an LCD TFT controller with overlays for hardware-accelerated

image composition, an image sensor controller, audio support through I

S, SSC, a stereo Class D

amplifier and a digital microphone. Connectivity peripherals include a 10/100 EMAC, USBs, CANs,

FLEXCOMs, UARTs, SPIs and two QSPIs, SDIO/SD/e.MMCs, and TWIs/I

Protection of code and data is provided by automatic scrambling of memories and an Integrity Check

Monitor (ICM) to detect any modification of the memory contents. The SAMA5D2 also supports execution

of encrypted code (QSPI or one portion of the DDR) with an “on-the-fly” encryption-decryption process.

With its secure design architecture, cryptographic acceleration engines, and secure bootloader, the

SAMA5D2 is the ideal solution for point-of-sale (POS), IoT and industrial applications requiring device

authentication, anti-cloning, data protection and secure communication.

SAMA5D2 devices feature three software-selectable low-power modes: Idle, Ultra-Low-Power and

Backup.

In Idle mode, the processor is stopped while all other functions can be kept running.

In Ultra-Low-Power mode 0, the processor is stopped while all other functions are clocked at 512 Hz and

interrupts or peripherals can be configured to wake up the system based on events, including partial

asynchronous wake-up (SleepWalking).

In Ultra-Low-Power mode 1, all clocks and functions are stopped but some peripherals can be configured

to wake up the system based on events, including partial asynchronous wake-up (SleepWalking).

In Backup mode, RTC and wake-up logic are active. The Backup mode can be extended to feature DDR

in Self-refresh mode.

SAMA5D2 devices also include an Event System that allows peripherals to receive, react to and send

events in Active and Idle modes without processor intervention.

2018 Microchip Technology Inc.

Datasheet Complete

DS60001476C-page 5

ATSAMA5D26C-CU Related Products

	ATSAMA5D26C-CU	ATSAMA5D22C-CU	ATSAMA5D22C-CN	ATSAMA5D27C-CU	ATSAMA5D26C-CN
Description	Microprocessor - MPU BGA GRN IND MRLC	Microprocessor - MPU BGA GRN IND MRLC	Microprocessor - MPU BGA GRN EXT MRLC	Microprocessor - MPU BGA GRN IND MRLC	Microprocessor - MPU BGA GRN IND MRLC
package instruction	LFBGA-289	TFBGA,	TFBGA, BGA196,14X14,30	LFBGA-289	LFBGA, BGA289,17X17,32
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
Address bus width	26	26	26	26	26
boundary scan	YES	YES	YES	YES	YES
maximum clock frequency	24 MHz	24 MHz	24 MHz	24 MHz	24 MHz
External data bus width	32	16	16	32	32
Format	FLOATING POINT	FLOATING POINT	FLOATING-POINT	FLOATING POINT	FLOATING POINT
Integrated cache	YES	YES	YES	YES	YES
JESD-30 code	S-PBGA-B289	S-PBGA-B196	S-PBGA-B196	S-PBGA-B289	S-PBGA-B289
length	14 mm	11 mm	11 mm	14 mm	14 mm
low power mode	YES	YES	YES	YES	YES
Number of terminals	289	196	196	289	289
Maximum operating temperature	85 °C	85 °C	105 °C	85 °C	105 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	TFBGA	TFBGA	LFBGA	LFBGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH
Maximum seat height	1.4 mm	1.2 mm	1.2 mm	1.4 mm	1.4 mm
speed	500 MHz	500 MHz	500 MHz	500 MHz	500 MHz
Maximum supply voltage	1.32 V	1.32 V	1.32 V	1.32 V	1.32 V
Minimum supply voltage	1.1 V	1.1 V	1.2 V	1.1 V	1.1 V
Nominal supply voltage	1.2 V	1.2 V	1.25 V	1.2 V	1.2 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.75 mm	0.75 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	14 mm	11 mm	11 mm	14 mm	14 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC
Maker	Microchip	-	Microchip	Microchip	Microchip
Factory Lead Time	8 weeks	8 weeks	-	8 weeks	-
bit size	32	-	32	32	32
Number of DMA channels	51	-	32	51	51
Number of external interrupt devices	125	-	1	125	125
On-chip data RAM width	8	-	8	8	8
Encapsulate equivalent code	BGA289,17X17,32	-	BGA196,14X14,30	BGA289,17X17,32	BGA289,17X17,32
RAM (number of words)	131072	-	131072	131072	131072
Base Number Matches	1	1	-	1	-

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