9FGL0841CKILFT datasheet, PDF - EEWORLD Datasheet

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9FGL0841CKILFT: DescriptionClock generators and supporting products; Categorysemiconductor The clock and timer IC The clock generator and supporting products; File Size328KB，23 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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Clock generators and supporting products

9FGL0841CKILFT Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology, Inc.)
Product Category	Clock generators and supporting products
series	9FGL0841
type	Clock Generators
Maximum input frequency	40 MHz
Maximum output frequency	100 MHz
Number of outputs	8 Output
Duty Cycle - Max	55 %
Working power voltage	3.3 V
Working power current	31 mA
Minimum operating temperature	- 40 C
Maximum operating temperature	+ 85 C
Installation style	SMD/SMT
Package/box	VFQFPN-48
Encapsulation	Reel
Output type	HCSL, LVCMOS
product	Clock Generators & Support Products
beat	35 ps
Factory packaging quantity	2500
Supply voltage - max.	3.465 V
Supply voltage - min.	3.135 V

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8-Output 3.3V PCIe Clock

Generator

9FGL0841 / 9FGL0851

Datasheet

Description

The 9FGL0841 / 9FGL0851 devices are 8-output clock generators

in IDT's 3.3V Full-Featured PCIe family. Each output has a

dedicated OE# pin for clock management.Two different spread

spectrum levels in addition to spread off are supported. The

9FGL0841 / 9FGL0851 supports PCIe Gen1–4 Common Clocked

architectures (CC) and PCIe Separate Reference no-Spread

(SRnS) and Separate Reference Independent Spread (SRIS)

clocking architectures.

Features

▪

Direct connection to loads saves 32 resistors compared to

standard PCIe devices

▪

206mW typical power consumption (at 3.3V); eliminates

thermal concerns

▪

DDIO

rail allows 35% power savings at optional 1.05V;

maximum power savings

▪

SMBus-selectable features allows optimization to customer

requirements:

Typical Applications

▪

Servers/High-Performance Computing/Accelerators

▪

Storage

▪

Embedded systems/Industrial control

Output Features

▪

8 100MHz Low-Power HCSL (LP-HCSL) DIF pairs:

33Ω, 85Ω or 100Ω output impedance for each output

▪

Devices contain default configuration; SMBus not required

•

Control input polarity

Control input pull-ups/pull-downs

Slew rate for each output

Differential output amplitude

•

9FGL0841 default Zo = 100Ω

•

9FGL0851 default Zo = 85Ω

▪

1 3.3V LVCMOS REF output; Wake-On-LAN (WOL) support

▪

See

AN-891

for easy AC-coupling to other logic families

Key Specifications

▪

PCIe Gen1–4 CC compliant; Gen2–3 SRIS compliant

DIF cycle-to-cycle jitter < 50ps

DIF output-to-output skew < 50ps

DIF 12kHz–20MHz phase jitter is < 2ps rms when SSC is off

REF phase jitter < 300fs rms; SSC off and < 1.9ps rms; SSC on

±100ppm frequency accuracy on all clocks

▪

Contact factory for customized versions

25MHz input frequency

OE# pins; support DIF power management

Pin-selectable SRnS, CC 0% and CC/SRIS -0.5% spread

SMBus-selectable CC/SRIS -0.25% spread

Clean switching between the CC/SRIS spread settings

DIF outputs blocked until PLL is locked; clean system start-up

2 selectable SMBus addresses

Space saving 6 × 6 mm 48-VFQFPN package

Block Diagram

vOE(7:0)#

XIN/CLKIN_25

25MHz

VDDA

VDDREF / VDDXTAL

VDDDIG

VDDOx2 / /VDDIOx5

REF

DIF7#

DIF7

DIF6#

DIF6

DIF5#

SSC Capable

PLL

DIF5

DIF4#

DIF4

DIF3#

DIF3

Control

Logic

DIF2#

DIF2

DIF1#

DIF1

DIF0#

DIF0

GNDXTAL / GNDREF

GNDDIG

GNDx2

EPAD

vSADR

^vSS_EN_tri

^CKPWRGD_PD#

SDATA_3.3

SCLK_3.3

September 17, 2018

9FGL0841 / 9FGL0851 Datasheet

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Output Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Key Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Test Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Alternate Terminations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Crystal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

General SMBus Serial Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

How to Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

How to Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Marking Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

September 17, 2018

9FGL0841CKILFT Related Products

	9FGL0841CKILFT	9FGL0841CKILF	9FGL0851CKILF	9FGL0851CKILFT
Description	Clock generators and supporting products	Clock generators and supporting products	Clock generators and supporting products	Clock generators and supporting products
Maker	IDT (Integrated Device Technology, Inc.)	IDT (Integrated Device Technology, Inc.)	IDT (Integrated Device Technology, Inc.)	IDT (Integrated Device Technology, Inc.)
Product Category	Clock generators and supporting products	Clock generators and supporting products	Clock generators and supporting products	Clock generators and supporting products
series	9FGL0841	9FGL0841	9FGL0851	9FGL0851
type	Clock Generators	Clock Generators	Clock Generators	Clock Generators
Maximum input frequency	40 MHz	40 MHz	40 MHz	40 MHz
Maximum output frequency	100 MHz	100 MHz	100 MHz	100 MHz
Number of outputs	8 Output	8 Output	8 Output	8 Output
Duty Cycle - Max	55 %	55 %	55 %	55 %
Working power voltage	3.3 V	3.3 V	3.3 V	3.3 V
Working power current	31 mA	31 mA	31 mA	31 mA
Minimum operating temperature	- 40 C	- 40 C	- 40 C	- 40 C
Maximum operating temperature	+ 85 C	+ 85 C	+ 85 C	+ 85 C
Installation style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT
Package/box	VFQFPN-48	VFQFPN-48	VFQFPN-48	VFQFPN-48
Encapsulation	Reel	Tray	Tray	Reel
Output type	HCSL, LVCMOS	HCSL, LVCMOS	HCSL, LVCMOS	HCSL, LVCMOS
product	Clock Generators & Support Products	Clock Generators & Support Products	Clock Generators & Support Products	Clock Generators & Support Products
beat	35 ps	35 ps	35 ps	35 ps
Factory packaging quantity	2500	490	490	2500
Supply voltage - max.	3.465 V	3.465 V	3.465 V	3.465 V
Supply voltage - min.	3.135 V	3.135 V	3.135 V	3.135 V

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