dsPIC33CH64MP505-I/PT datasheet, PDF

Datasheet> All Categories > semiconductor> The embedded processor and controller> Digital signal processor and controller - DSP, DSC> dsPIC33CH64MP505-I/PT

Preview

dsPIC33CH64MP505-I/PT: DescriptionDigital Signal Processor and Controller-DSP, DSC 16 Bit DSC, Dual Core, 64K Flash, 16K+ 4K RAM, 100MHz, 48Pin, CAN; Categorysemiconductor The embedded processor and controller Digital signal processor and controller - DSP, DSC; File Size5MB，809 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

Download Datasheet Download user manual Parametric View All

dsPIC33CH64MP505-I/PT Overview

Digital Signal Processor and Controller-DSP, DSC 16 Bit DSC, Dual Core, 64K Flash, 16K+ 4K RAM, 100MHz, 48Pin, CAN

dsPIC33CH64MP505-I/PT Parametric

Parameter Name	Attribute value
Maker	Microchip
Product Category	Digital Signal Processors and Controllers - DSP, DSC
Installation style	SMD/SMT
Package/box	TQFP-48
series	dsPIC33CH
product	DSCs
core	dsPIC33CH
maximum clock frequency	180 MHz, 200 MHz
Program memory size	24 kB, 64 kB
Data RAM size	4 kB, 16 kB
Working power voltage	3 V to 3.6 V
Minimum operating temperature	- 40 C
Maximum operating temperature	+ 85 C
Encapsulation	Tray
Program memory type	Flash
Interface Type	CAN, I2C, I2S, SPI, UART
Data bus width	16 bit
Instruction type	Fixed/Floating Point
Number of cores	2 Core
Number of timers/counters	1 Timer
Factory packaging quantity	250
Supply voltage - max.	3.6 V
Supply voltage - min.	3 V
watchdog timer	Watchdog Timer

User Manual

Preview

Download Datasheet

View All

dsPIC33CH128MP508 FAMILY

28/36/48/64/80-Pin Dual Core, 16-Bit Digital Signal Controllers

with High-Resolution PWM and CAN Flexible Data (CAN FD)

Operating Conditions

• 3V to 3.6V, -40°C to +125°C:

- Master Core: DC to 90 MIPS

- Slave Core: DC to 100 MIPS

Power Management

• Low-Power Management Modes

(Sleep, Idle, Doze)

• Integrated Power-on Reset and Brown-out Reset

Core: Dual 16-Bit dsPIC33CH CPU

• Master/Slave Core Operation

• Independent Peripherals for Master Core and

Slave Core

• Dual Partition for Slave PRAM LiveUpdate

• Configurable Shared Resources for Master Core

and Slave Core

• Master Core with 64-128 Kbytes of Program

Flash with ECC and 16K RAM

• Slave Core with 24 Kbytes of Program RAM

(PRAM) with ECC and 4K Data Memory RAM

• Fast 6-Cycle Divide

• Message Boxes and FIFO to Communicate

Between Master and Slave (MSI)

• Code Efficient (C and Assembly) Architecture

• 40-Bit Wide Accumulators

• Single-Cycle (MAC/MPY) with Dual Data Fetch

• Single-Cycle, Mixed-Sign MUL Plus Hardware

Divide

• 32-Bit Multiply Support

• Five Sets of Interrupt Context Selected Registers

and Accumulators per Core for Fast Interrupt

Response

• Zero Overhead Looping

High Resolution PWM with Fine Edge

Placement

• Up to 12 PWM Channels:

- Four channels for Master

- Eight channels for Slave

• 250 ps PWM Resolution

• Applications Include:

- DC/DC Converters

- AC/DC power supplies

- Uninterruptable Power Supply (UPS)

- Motor Control: BLDC, PMSM, SR, ACIM

Timers/Output Compare/Input Capture

• Two General Purpose 16-Bit Timers:

- One each for Master and Slave

• Peripheral Trigger Generator (PTG) Module:

- One module for Master

- Slave can interrupt on select PTG sources

- Useful for automating complex sequences

• 12 SCCP Modules:

- Eight modules for Master

- Four modules for Slave

- Timer, Capture/Compare and PWM Modes

- 16 or 32-bit time base

- 16 or 32-bit capture

- 4-deep capture buffer

- Fully Asynchronous Operation, Available in

Sleep Modes

Clock Management

• Internal Oscillator

• Programmable PLLs and Oscillator Clock

Sources

• Master Reference Clock Output

• Slave Reference Clock Output

• Fail-Safe Clock Monitor (FSCM)

• Fast Wake-up and Start-up

• Backup Internal Oscillator

• LPRC Oscillator



2017-2018 Microchip Technology Inc.

DS70005319B-page 1

Recommended Resources

Memory circuit of ACU7505 chip MP3 player

Button type electronic volume control circuit

Three electric motors have control circuits required for starting and stopping sequences

Charger circuit designed by lm358

Using LT1044 to generate negative power supply circuit diagram

Internal equivalent circuit diagram of STRD1806

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components