MT48H16M32LFB5-6 IT:C TR datasheet, PDF

Datasheet> All Categories > semiconductor> Memory IC> Dynamic random access memory> MT48H16M32LFB5-6 IT:C TR

MT48H16M32LFB5-6 IT:C TR: DescriptionDynamic random access memory MOBILE S dynamic random access memory 512M 16MX32 FBGA; Categorysemiconductor Memory IC Dynamic random access memory; File Size3MB，88 Pages; ManufacturerMicron; Websitehttp://www.micron.com/; Environmental Compliance

Download Datasheet Parametric Compare View All

MT48H16M32LFB5-6 IT:C TR Overview

Dynamic random access memory MOBILE S dynamic random access memory 512M 16MX32 FBGA

MT48H16M32LFB5-6 IT:C TR Parametric

Parameter Name	Attribute value
Maker	Micron
Product Category	dynamic random access memory
type	SDRAM Mobile - LPSDR
Data bus width	32 bit
organize	16 M x 32
Package/box	VFBGA-90
storage	512 Mbit
maximum clock frequency	166 MHz
interview time	8 ns
Supply voltage - max.	1.95 V
Supply voltage - min.	1.7 V
Supply current—max.	90 mA
Minimum operating temperature	- 40 C
Maximum operating temperature	+ 85 C
series	MT48H16M32LFB5
Encapsulation	Cut Tape
Encapsulation	MouseReel
Encapsulation	Reel
Installation style	SMD/SMT
Factory packaging quantity	1000

Preview

Download Datasheet

View All

512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM

Features

Mobile LPSDR SDRAM

MT48H32M16LF – 8 Meg x 16 x 4 Banks

MT48H16M32LF/LG – 4 Meg x 32 x 4 Banks

Features

• V

DDQ

= 1.7–1.95V

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• Four internal banks for concurrent operation

• Programmable burst lengths: 1, 2, 4, 8, and continu-

ous

• Auto precharge, includes concurrent auto precharge

• Auto refresh and self refresh modes

• LVTTL-compatible inputs and outputs

• On-chip temperature sensor to control self refresh

rate

• Partial-array self refresh (PASR)

• Deep power-down (DPD)

• Selectable output drive strength (DS)

• 64ms refresh period; 32ms for automotive tempera-

ture

Options

• V

DDQ

: 1.8V/1.8V

• Addressing

– Standard addressing option

– Reduced page size option

• Configuration

– 32 Meg x 16 (8 Meg x 16 x 4

banks)

– 16 Meg x 32 (4 Meg x 32 x 4

banks)

• Plastic “green” packages

– 54-ball VFBGA (8mm x 8mm)

– 90-ball VFBGA (8mm x 13mm)

• Timing – cycle time

– 6ns at CL = 3

– 7.5ns at CL = 3

• Power

– Standard I

DD2

DD7

– Low-power I

DD2

DD71

• Operating temperature range

– Commercial (0˚C to +70˚C)

– Industrial (–40˚C to +85˚C)

– Automotive (–40˚C to +105˚C)

• Revision

Notes:

Marking

32M16

16M32

-6

-75

None

1. Contact factory for availability.

2. Available only for x16 configuration.

3. Available only for x32 configuration.

Table 1: Configuration Addressing

Architecture

Number of banks

Bank address balls

Row address balls

Column address balls

Note: 1. Contact factory for availability.

32 Meg x 16

BA0, BA1

A[12:0]

A[9:0]

16 Meg x 32

BA0, BA1

A[12:0]

A[8:0]

16 Meg x 32 Reduced

Page Size Option

BA0, BA1

A[13:0]

A[7:0]

PDF: 09005aef8459c827

512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM

Features

Contents

Important Notes and Warnings ......................................................................................................................... 8

General Description ......................................................................................................................................... 9

Functional Block Diagram .............................................................................................................................. 10

Ball Assignments and Descriptions ................................................................................................................. 11

Package Dimensions ....................................................................................................................................... 14

Electrical Specifications .................................................................................................................................. 16

Absolute Maximum Ratings ........................................................................................................................ 16

Electrical Specifications – I

Parameters ........................................................................................................ 18

Electrical Specifications – AC Operating Conditions ......................................................................................... 22

Output Drive Characteristics ........................................................................................................................... 25

Functional Description ................................................................................................................................... 28

Commands .................................................................................................................................................... 29

COMMAND INHIBIT .................................................................................................................................. 30

NO OPERATION (NOP) ............................................................................................................................... 30

LOAD MODE REGISTER (LMR) ................................................................................................................... 30

ACTIVE ...................................................................................................................................................... 30

READ ......................................................................................................................................................... 31

WRITE ....................................................................................................................................................... 32

PRECHARGE .............................................................................................................................................. 33

BURST TERMINATE ................................................................................................................................... 33

AUTO REFRESH ......................................................................................................................................... 33

SELF REFRESH ........................................................................................................................................... 34

DEEP POWER-DOWN ................................................................................................................................. 34

Truth Tables ................................................................................................................................................... 35

Initialization .................................................................................................................................................. 40

Mode Register ................................................................................................................................................ 42

Burst Length .............................................................................................................................................. 43

Burst Type .................................................................................................................................................. 43

CAS Latency ............................................................................................................................................... 45

Operating Mode ......................................................................................................................................... 45

Write Burst Mode ....................................................................................................................................... 45

Extended Mode Register ................................................................................................................................. 46

Temperature-Compensated Self Refresh ...................................................................................................... 46

Partial-Array Self Refresh ............................................................................................................................ 47

Output Drive Strength ................................................................................................................................ 47

Bank/Row Activation ...................................................................................................................................... 48

READ Operation ............................................................................................................................................. 49

WRITE Operation ........................................................................................................................................... 58

Burst Read/Single Write .............................................................................................................................. 65

PRECHARGE Operation .................................................................................................................................. 66

Auto Precharge ........................................................................................................................................... 66

AUTO REFRESH Operation ............................................................................................................................. 78

SELF REFRESH Operation ............................................................................................................................... 80

Power-Down .................................................................................................................................................. 82

Deep Power-Down ......................................................................................................................................... 83

Clock Suspend ............................................................................................................................................... 84

Revision History ............................................................................................................................................. 87

Rev. C, Production – 10/2018 ....................................................................................................................... 87

Rev. B, Production – 3/11 ............................................................................................................................ 87

Rev. A, Preliminary – 2/11 ........................................................................................................................... 87

PDF: 09005aef8459c827

512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM

Features

List of Figures

Figure 1: 512Mb Mobile LPSDR Part Numbering ............................................................................................... 2

Figure 2: Functional Block Diagram ............................................................................................................... 10

Figure 3: 54-Ball VFBGA (Top View) ............................................................................................................... 11

Figure 4: 90-Ball VFBGA (Top View) ............................................................................................................... 12

Figure 5: 54-Ball VFBGA (8mm x 8mm) .......................................................................................................... 14

Figure 6: 90-Ball VFBGA (8mm x 13mm) ......................................................................................................... 15

Figure 7: Typical Self Refresh Current vs. Temperature .................................................................................... 21

Figure 8: ACTIVE Command .......................................................................................................................... 30

Figure 9: READ Command ............................................................................................................................. 31

Figure 10: WRITE Command ......................................................................................................................... 32

Figure 11: PRECHARGE Command ................................................................................................................ 33

Figure 12: Initialize and Load Mode Register .................................................................................................. 41

Figure 13: Mode Register Definition ............................................................................................................... 42

Figure 14: CAS Latency .................................................................................................................................. 45

Figure 15: Extended Mode Register Definition ................................................................................................ 46

Figure 16: Example: Meeting

RCD (MIN) When 2 <

RCD (MIN)/

CK < 3 .......................................................... 48

Figure 17: Consecutive READ Bursts .............................................................................................................. 50

Figure 18: Random READ Accesses ................................................................................................................ 51

Figure 19: READ-to-WRITE ............................................................................................................................ 52

Figure 20: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 53

Figure 21: READ-to-PRECHARGE .................................................................................................................. 53

Figure 22: Terminating a READ Burst ............................................................................................................. 54

Figure 23: Alternating Bank Read Accesses ..................................................................................................... 55

Figure 24: READ Continuous Page Burst ......................................................................................................... 56

Figure 25: READ – DQM Operation ................................................................................................................ 57

Figure 26: WRITE Burst ................................................................................................................................. 58

Figure 27: WRITE-to-WRITE .......................................................................................................................... 59

Figure 28: Random WRITE Cycles .................................................................................................................. 60

Figure 29: WRITE-to-READ ............................................................................................................................ 60

Figure 30: WRITE-to-PRECHARGE ................................................................................................................. 61

Figure 31: Terminating a WRITE Burst ............................................................................................................ 62

Figure 32: Alternating Bank Write Accesses ..................................................................................................... 63

Figure 33: WRITE – Continuous Page Burst ..................................................................................................... 64

Figure 34: WRITE – DQM Operation ............................................................................................................... 65

Figure 35: READ With Auto Precharge Interrupted by a READ ......................................................................... 67

Figure 36: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 68

Figure 37: READ With Auto Precharge ............................................................................................................ 69

Figure 38: READ Without Auto Precharge ....................................................................................................... 70

Figure 39: Single READ With Auto Precharge .................................................................................................. 71

Figure 40: Single READ Without Auto Precharge ............................................................................................. 72

Figure 41: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 73

Figure 42: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 73

Figure 43: WRITE With Auto Precharge ........................................................................................................... 74

Figure 44: WRITE Without Auto Precharge ..................................................................................................... 75

Figure 45: Single WRITE With Auto Precharge ................................................................................................. 76

Figure 46: Single WRITE Without Auto Precharge ............................................................................................ 77

Figure 47: Auto Refresh Mode ........................................................................................................................ 79

Figure 48: Self Refresh Mode .......................................................................................................................... 81

Figure 49: Power-Down Mode ........................................................................................................................ 82

Figure 50: Clock Suspend During WRITE Burst ............................................................................................... 84

PDF: 09005aef8459c827

512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT48H16M32LFB5-6 IT:C TR Related Products

	MT48H16M32LFB5-6 IT:C TR	MT48H32M16LFB4-6 IT:C TR	MT48H32M16LFB4-6 AT:C TR	MT48H32M16LFB4-6 AT:C	MT48H16M32LFB5-6 IT:C	MT48H32M16LFB4-6 IT:C
Description	Dynamic random access memory MOBILE S dynamic random access memory 512M 16MX32 FBGA	Dynamic random access memory MOBILE S dynamic random access memory 512M 32MX16 FBGA	Dynamic random access memory MOBILE S dynamic random access memory 512M 32MX16 FBGA	Dynamic random access memory MOBILE S dynamic random access memory 512M 32MX16 FBGA	Dynamic random access memory MOBILE S dynamic random access memory 512M 16MX32 FBGA	Dynamic random access memory MOBILE S dynamic random access memory 512M 32MX16 FBGA
Maker	Micron	Micron	Micron	Micron	Micron	Micron
Product Category	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory
type	SDRAM Mobile - LPSDR	SDRAM Mobile - LPSDR	SDRAM Mobile - LPSDR	SDRAM Mobile - LPSDR	SDRAM Mobile - LPSDR	SDRAM Mobile - LPSDR
Data bus width	32 bit	16 bit	16 bit	16 bit	32 bit	16 bit
organize	16 M x 32	32 M x 16	32 M x 16	32 M x 16	16 M x 32	32 M x 16
Package/box	VFBGA-90	VFBGA-54	VFBGA-54	VFBGA-54	VFBGA-90	VFBGA-54
storage	512 Mbit	512 Mbit	512 Mbit	512 Mbit	512 Mbit	512 Mbit
maximum clock frequency	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz	166 MHz
interview time	8 ns	8 ns	8 ns	8 ns	8 ns	8 ns
Supply voltage - max.	1.95 V	1.95 V	1.95 V	1.95 V	1.95 V	1.95 V
Supply voltage - min.	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Supply current—max.	90 mA	90 mA	90 mA	90 mA	90 mA	90 mA
Minimum operating temperature	- 40 C	- 40 C	- 40 C	- 40 C	- 40 C	- 40 C
Maximum operating temperature	+ 85 C	+ 85 C	+ 105 C	+ 105 C	+ 85 C	+ 85 C
series	MT48H16M32LFB5	MT48H32M16LFB4	MT48H32M16LFB4	MT48H32M16LFB4	MT48H16M32LFB5	MT48H32M16LFB4
Installation style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT
Factory packaging quantity	1000	1000	1000	1560	1440	1560
Encapsulation	Reel	Reel	Reel	Tray	Tray	Tray

Recommended Resources

Gas leakage automatic alarm, automatic circuit shut-off

Delay circuit

Circuit diagram of ultrasonic range finder composed of ultrasonic ranging integrated circuit SB5027 with calendar clock

Using bidirectional thyristor to control temperature circuit diagram

Sample and hold circuit diagram using feedback to reduce drift

Refrigerator temperature indicator circuit

Does anyone have the official routines for Zhongying SH33F28XX? I need the resources.: RT...; oyhprince Domestic Chip Exchange

Problems in setting initial value when T1 of 51 series single chip microcomputer is used as baud rate generator: When reading a piece of code from a company, I found the following: SCON = 0xd0; PCON |= 0xC0; TMOD &= 0x0F; TMOD |= 0x20; TH1 = 256 - ((FREQ_OSC * 2L * 125L)/ (48L * 9600L)); TH1 should be = 256-(FRE...; stonepal Embedded System

How to make a 100MA steady current source: [i=s]This post was last edited by paulhyde on 2014-9-15 03:36[/i] Is there anyone who can make a steady current source? Let's take a look at it together[flash=22,22]Steady current source[/flash]...; love政广 Electronics Design Contest

TI LM3S811 Chinese data: I got the board and started learning. However, due to my limited English, I found some Chinese materials and now share them with you for those who need them... Let's learn LM3S811 together......; farme Microcontroller MCU

[Antai Q&A] What is a wiring harness tester? Where is it used?: [Antai QA] What is a wiring harness tester? Where is it used?...; aigtekatdz Test/Measurement

New members of LPC11XX: Today I saw that the LPC11XX series CORTEX-M0 core ARM has new members, namely LPC11C12 and LPC11C14. The new members mainly add CAN drivers. The principle block diagram is as follows:...; lixiaohai8211 NXP MCU

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components