512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Mobile LPSDR SDRAM
MT48H32M16LF – 8 Meg x 16 x 4 Banks
MT48H16M32LF/LG – 4 Meg x 32 x 4 Banks
Features
• V
DD
/V
DDQ
= 1.7–1.95V
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal, pipelined operation; column address can
be changed every clock cycle
• Four internal banks for concurrent operation
• Programmable burst lengths: 1, 2, 4, 8, and continu-
ous
• Auto precharge, includes concurrent auto precharge
• Auto refresh and self refresh modes
• LVTTL-compatible inputs and outputs
• On-chip temperature sensor to control self refresh
rate
• Partial-array self refresh (PASR)
• Deep power-down (DPD)
• Selectable output drive strength (DS)
• 64ms refresh period; 32ms for automotive tempera-
ture
Options
• V
DD
/V
DDQ
: 1.8V/1.8V
• Addressing
– Standard addressing option
– Reduced page size option
1
• Configuration
– 32 Meg x 16 (8 Meg x 16 x 4
banks)
– 16 Meg x 32 (4 Meg x 32 x 4
banks)
• Plastic “green” packages
– 54-ball VFBGA (8mm x 8mm)
2
– 90-ball VFBGA (8mm x 13mm)
3
• Timing – cycle time
– 6ns at CL = 3
– 7.5ns at CL = 3
• Power
– Standard I
DD2
/I
DD7
– Low-power I
DD2
/I
DD71
• Operating temperature range
– Commercial (0˚C to +70˚C)
– Industrial (–40˚C to +85˚C)
– Automotive (–40˚C to +105˚C)
• Revision
Notes:
Marking
H
LF
LG
32M16
16M32
B4
B5
-6
-75
None
L
None
IT
AT
:C
1. Contact factory for availability.
2. Available only for x16 configuration.
3. Available only for x32 configuration.
Table 1: Configuration Addressing
Architecture
Number of banks
Bank address balls
Row address balls
Column address balls
Note: 1. Contact factory for availability.
32 Meg x 16
4
BA0, BA1
A[12:0]
A[9:0]
16 Meg x 32
4
BA0, BA1
A[12:0]
A[8:0]
16 Meg x 32 Reduced
Page Size Option
1
4
BA0, BA1
A[13:0]
A[7:0]
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Table 2: Key Timing Parameters
Clock Rate (MHz)
Speed Grade
-6
Note:
CL = 2
104
CL = 3
166
133
CL = 2
8ns
8ns
Access Time
CL = 3
5ns
5.4ns
-75
104
1. CL = CAS (READ) latency.
Figure 1: 512Mb Mobile LPSDR Part Numbering
MT
Micron Technology
Product Family
48 = Mobile LPSDR SDRAM
48
H 32M16 LF
B4
-75
IT
:C
Design Revision
:C = Device generation
Operating Temperature
Blank = Commercial (0°C to +70°C)
IT = Industrial (–40°C to +85°C)
AT = Automotive (–40°C to +105°C)
Operating Voltage
H = 1.8V/1.8V
Configuration
32M16 = 32 Meg x 16
16M32 = 16 Meg x 32
Low Power
Blank = Standard I
DD2
/I
DD7
L = Low-power I
DD2
/I
DD7
Addressing
LF = Standard addressing
LG = Reduced page size
Cycle Time
-6 = 6ns,
t
CK CL = 3
-75 = 7.5ns,
t
CK CL = 3
Package Codes
B4 = 8mm x 8mm, VFBGA, “green”
B5 = 8mm x 13mm, VFBGA, “green”
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. Micron’s FBGA part marking decoder is available at
www.micron.com/decoder.
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512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Contents
Important Notes and Warnings ......................................................................................................................... 8
General Description ......................................................................................................................................... 9
Functional Block Diagram .............................................................................................................................. 10
Ball Assignments and Descriptions ................................................................................................................. 11
Package Dimensions ....................................................................................................................................... 14
Electrical Specifications .................................................................................................................................. 16
Absolute Maximum Ratings ........................................................................................................................ 16
Electrical Specifications – I
DD
Parameters ........................................................................................................ 18
Electrical Specifications – AC Operating Conditions ......................................................................................... 22
Output Drive Characteristics ........................................................................................................................... 25
Functional Description ................................................................................................................................... 28
Commands .................................................................................................................................................... 29
COMMAND INHIBIT .................................................................................................................................. 30
NO OPERATION (NOP) ............................................................................................................................... 30
LOAD MODE REGISTER (LMR) ................................................................................................................... 30
ACTIVE ...................................................................................................................................................... 30
READ ......................................................................................................................................................... 31
WRITE ....................................................................................................................................................... 32
PRECHARGE .............................................................................................................................................. 33
BURST TERMINATE ................................................................................................................................... 33
AUTO REFRESH ......................................................................................................................................... 33
SELF REFRESH ........................................................................................................................................... 34
DEEP POWER-DOWN ................................................................................................................................. 34
Truth Tables ................................................................................................................................................... 35
Initialization .................................................................................................................................................. 40
Mode Register ................................................................................................................................................ 42
Burst Length .............................................................................................................................................. 43
Burst Type .................................................................................................................................................. 43
CAS Latency ............................................................................................................................................... 45
Operating Mode ......................................................................................................................................... 45
Write Burst Mode ....................................................................................................................................... 45
Extended Mode Register ................................................................................................................................. 46
Temperature-Compensated Self Refresh ...................................................................................................... 46
Partial-Array Self Refresh ............................................................................................................................ 47
Output Drive Strength ................................................................................................................................ 47
Bank/Row Activation ...................................................................................................................................... 48
READ Operation ............................................................................................................................................. 49
WRITE Operation ........................................................................................................................................... 58
Burst Read/Single Write .............................................................................................................................. 65
PRECHARGE Operation .................................................................................................................................. 66
Auto Precharge ........................................................................................................................................... 66
AUTO REFRESH Operation ............................................................................................................................. 78
SELF REFRESH Operation ............................................................................................................................... 80
Power-Down .................................................................................................................................................. 82
Deep Power-Down ......................................................................................................................................... 83
Clock Suspend ............................................................................................................................................... 84
Revision History ............................................................................................................................................. 87
Rev. C, Production – 10/2018 ....................................................................................................................... 87
Rev. B, Production – 3/11 ............................................................................................................................ 87
Rev. A, Preliminary – 2/11 ........................................................................................................................... 87
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512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
List of Figures
Figure 1: 512Mb Mobile LPSDR Part Numbering ............................................................................................... 2
Figure 2: Functional Block Diagram ............................................................................................................... 10
Figure 3: 54-Ball VFBGA (Top View) ............................................................................................................... 11
Figure 4: 90-Ball VFBGA (Top View) ............................................................................................................... 12
Figure 5: 54-Ball VFBGA (8mm x 8mm) .......................................................................................................... 14
Figure 6: 90-Ball VFBGA (8mm x 13mm) ......................................................................................................... 15
Figure 7: Typical Self Refresh Current vs. Temperature .................................................................................... 21
Figure 8: ACTIVE Command .......................................................................................................................... 30
Figure 9: READ Command ............................................................................................................................. 31
Figure 10: WRITE Command ......................................................................................................................... 32
Figure 11: PRECHARGE Command ................................................................................................................ 33
Figure 12: Initialize and Load Mode Register .................................................................................................. 41
Figure 13: Mode Register Definition ............................................................................................................... 42
Figure 14: CAS Latency .................................................................................................................................. 45
Figure 15: Extended Mode Register Definition ................................................................................................ 46
Figure 16: Example: Meeting
t
RCD (MIN) When 2 <
t
RCD (MIN)/
t
CK < 3 .......................................................... 48
Figure 17: Consecutive READ Bursts .............................................................................................................. 50
Figure 18: Random READ Accesses ................................................................................................................ 51
Figure 19: READ-to-WRITE ............................................................................................................................ 52
Figure 20: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 53
Figure 21: READ-to-PRECHARGE .................................................................................................................. 53
Figure 22: Terminating a READ Burst ............................................................................................................. 54
Figure 23: Alternating Bank Read Accesses ..................................................................................................... 55
Figure 24: READ Continuous Page Burst ......................................................................................................... 56
Figure 25: READ – DQM Operation ................................................................................................................ 57
Figure 26: WRITE Burst ................................................................................................................................. 58
Figure 27: WRITE-to-WRITE .......................................................................................................................... 59
Figure 28: Random WRITE Cycles .................................................................................................................. 60
Figure 29: WRITE-to-READ ............................................................................................................................ 60
Figure 30: WRITE-to-PRECHARGE ................................................................................................................. 61
Figure 31: Terminating a WRITE Burst ............................................................................................................ 62
Figure 32: Alternating Bank Write Accesses ..................................................................................................... 63
Figure 33: WRITE – Continuous Page Burst ..................................................................................................... 64
Figure 34: WRITE – DQM Operation ............................................................................................................... 65
Figure 35: READ With Auto Precharge Interrupted by a READ ......................................................................... 67
Figure 36: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 68
Figure 37: READ With Auto Precharge ............................................................................................................ 69
Figure 38: READ Without Auto Precharge ....................................................................................................... 70
Figure 39: Single READ With Auto Precharge .................................................................................................. 71
Figure 40: Single READ Without Auto Precharge ............................................................................................. 72
Figure 41: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 73
Figure 42: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 73
Figure 43: WRITE With Auto Precharge ........................................................................................................... 74
Figure 44: WRITE Without Auto Precharge ..................................................................................................... 75
Figure 45: Single WRITE With Auto Precharge ................................................................................................. 76
Figure 46: Single WRITE Without Auto Precharge ............................................................................................ 77
Figure 47: Auto Refresh Mode ........................................................................................................................ 79
Figure 48: Self Refresh Mode .......................................................................................................................... 81
Figure 49: Power-Down Mode ........................................................................................................................ 82
Figure 50: Clock Suspend During WRITE Burst ............................................................................................... 84
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Figure 51: Clock Suspend During READ Burst ................................................................................................. 85
Figure 52: Clock Suspend Mode ..................................................................................................................... 86
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. C 10/2018 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
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