5. Bluetooth Features ......................................................................................................................................7
BH661C-503, BH661C-551 Secure Connection
BH661C-009
6. General Device Requirements and Operation ............................................................................................7
Revision History ............................................................................................................................................. 16
Contact Us ..................................................................................................................................................... 17
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2
BlueFan BH661C, Dual Mode Bluetooth 4.2 Module
Ver 2..0 Jan 2018
1. Introduction
BH661C is a dual mode BLE (Bluetooth Low Energy) and Bluetooth Classic module using Toshiba
TC35661 SOC.
TC35661 provides Bluetooth
TM
HCI (Host Control Interface) function specified in Bluetooth
TM
Core
Specifications. The HCI function allows BH661 to be connected to an external host processor for
Bluetooth applications.
2. Product Overview
The following is a block diagram of Toshiba BH661. It communicates with a host processor via an
UART port. A 26MHz main clock crystal is on board. For lower power consumption in sleep mode, an
external 32.768 KHz clock source is required. This module can be wake up by an external signal
An chip antenna is on board.
For ROM code supporting wide band voice, use I
2
S interface to connect to an external codec.
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3
BlueFan BH661C, Dual Mode Bluetooth 4.2 Module
Ver 2..0 Jan 2018
3. Hardware Description
Mechanical Drawings of BH661C
The size of BH661C is 11.1x16.7x1.9mm. The mechanical drawing is shown below.
Pin Assignments of BH661C
Pin Functions
Pin
1
2
3
4
5
6
7
Pin name
NC
GND
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 16
Descriptions
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4
BlueFan BH661C, Dual Mode Bluetooth 4.2 Module
Ver 2..0 Jan 2018
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GPIO 05
GPIO 01
GPIO 02
SLEEPCLK
CLKREQ
RESET
GPIO 00
NC
NC
UART1-RTS
UART1-CTS
UART1-RX
UART1-TX
GPIO 14
GPIO 15
VDD
GND
GPIO 14, set by firmware to SCL
GPIO 15, set by firmware to SDA
Power supply, 2.0 to 3.6 V
Ground
32.768 kHz sleep clock in
High when clock frequency is stable
External reset, active low
GPIO 00, set by firmware to WAKE-UP0
GPIO1, set by firmware to Analog to Digital Converter input 0
4. UART Interface
Features
• Full duplex 4-wire data transfer: RX, TX, RTSX, CTSX.
• Programmable baud rate:2400 bps to 4.33 Mbps.
•
Data format:
✦
LSB first
✦
1 start bit
✦
8 data bit
✦
1 stop bit
✦
No parity bit
• Error detection:
✦
Character timeout
✦
Overrun error
✦
Framing error
TC35661 UART interface is used to transfer control command and data and is multiplexed with GPIO
pin. After to release reset state, TC35661 software sets UART interface to related GPIO pins. The
default bit rate depends on the selection ROM version. (e.g.