5962-9324803MXA datasheet, PDF

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5962-9324803MXA: DescriptionUV PLD, 40ns, CMOS, CQCC68, WINDOWED, CERAMIC, JLCC-68; CategoryProgrammable logic Programmable logic devices; File Size395KB，13 Pages; ManufacturerAtmel (Microchip)

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5962-9324803MXA Overview

UV PLD, 40ns, CMOS, CQCC68, WINDOWED, CERAMIC, JLCC-68

5962-9324803MXA Parametric

Parameter Name	Attribute value
Maker	Atmel (Microchip)
Parts packaging code	LCC
package instruction	WQCCJ,
Contacts	68
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Is Samacsys	N
Other features	52 MACROCELLS; BURIED MACROCELLS
maximum clock frequency	25 MHz
JESD-30 code	S-CQCC-J68
JESD-609 code	e0
length	24.15 mm
Dedicated input times	8
Number of I/O lines	52
Number of terminals	68
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	8 DEDICATED INPUTS, 52 I/O
Output function	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	WQCCJ
Package shape	SQUARE
Package form	CHIP CARRIER, WINDOW
Programmable logic type	UV PLD
propagation delay	40 ns
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	24.15 mm
Base Number Matches	1

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5962-9324803MXA Related Products

	5962-9324803MXA	5962-9324802MXA	5962-9324802MYA	5962-9324803MYA
Description	UV PLD, 40ns, CMOS, CQCC68, WINDOWED, CERAMIC, JLCC-68	UV PLD, 40ns, CMOS, CQCC68, WINDOWED, CERAMIC, JLCC-68	UV PLD, 40ns, CMOS, CPGA68, WINDOWED, CERAMIC, PGA-68	UV PLD, 40ns, CMOS, CPGA68, WINDOWED, CERAMIC, PGA-68
Parts packaging code	LCC	LCC	PGA	PGA
package instruction	WQCCJ,	WQCCJ,	WPGA,	WPGA,
Contacts	68	68	68	68
Reach Compliance Code	unknown	unknow	unknown	unknown
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Other features	52 MACROCELLS; BURIED MACROCELLS	52 MACROCELLS; BURIED MACROCELLS	52 MACROCELLS; BURIED MACROCELLS	52 MACROCELLS; BURIED MACROCELLS
maximum clock frequency	25 MHz	25 MHz	25 MHz	25 MHz
JESD-30 code	S-CQCC-J68	S-CQCC-J68	S-CPGA-P68	S-CPGA-P68
JESD-609 code	e0	e0	e0	e0
length	24.15 mm	24.15 mm	29.464 mm	29.464 mm
Dedicated input times	8	8	8	8
Number of I/O lines	52	52	52	52
Number of terminals	68	68	68	68
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C
organize	8 DEDICATED INPUTS, 52 I/O	8 DEDICATED INPUTS, 52 I/O	8 DEDICATED INPUTS, 52 I/O	8 DEDICATED INPUTS, 52 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	WQCCJ	WQCCJ	WPGA	WPGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER, WINDOW	CHIP CARRIER, WINDOW	GRID ARRAY, WINDOW	GRID ARRAY, WINDOW
Programmable logic type	UV PLD	UV PLD	UV PLD	UV PLD
propagation delay	40 ns	40 ns	40 ns	40 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Filter level	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883
Maximum seat height	5.08 mm	5.08 mm	5.08 mm	5.08 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	J BEND	J BEND	PIN/PEG	PIN/PEG
Terminal pitch	1.27 mm	1.27 mm	2.54 mm	2.54 mm
Terminal location	QUAD	QUAD	PERPENDICULAR	PERPENDICULAR
width	24.15 mm	24.15 mm	29.464 mm	29.464 mm
Maker	Atmel (Microchip)	-	Atmel (Microchip)	Atmel (Microchip)
Base Number Matches	1	1	1	-

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