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DM74ALS151MX

Description
Multiplexer, ALS Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16
Categorylogic   
File Size56KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
Download Datasheet Parametric View All

DM74ALS151MX Overview

Multiplexer, ALS Series, 1-Func, 8 Line Input, 1 Line Output, Complementary Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16

DM74ALS151MX Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instruction0.150 INCH, MS-012, SOIC-16
Contacts16
Reach Compliance Codeunknown
Is SamacsysN
seriesALS
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length9.9 mm
Logic integrated circuit typeMULTIPLEXER
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions1
Number of entries8
Output times1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Maximum supply current (ICC)12 mA
Prop。Delay @ Nom-Sup15 ns
propagation delay (tpd)15 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
Base Number Matches1
DM74ALS151 1 of 8 Line Data Selector/Multiplexer
April 1984
Revised February 2000
DM74ALS151
1 of 8 Line Data Selector/Multiplexer
General Description
This Data Selector/Multiplexer contains full on-chip decod-
ing to select one-of-eight data sources as a result of a
unique three-bit binary code at the Select inputs. Two com-
plementary outputs provide both inverting and non-invert-
ing buffer operation. A Strobe input is provided which,
when at the high level, disables all data inputs and forces
the Y output to the LOW state and the W output to the
HIGH state. The Select input buffers incorporate internal
overlap features to ensure that select input changes do not
cause invalid output transients.
Features
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Switching performance is guaranteed over full tempera-
ture and V
CC
supply range
s
Pin and functional compatible with LS family counterpart
s
Improved output transient handling capability
Ordering Code:
Order Number
DM74ALS151M
DM74ALS151N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
Select
C
X
L
L
L
L
H
H
H
H
B
X
L
L
H
H
L
L
H
H
A
X
L
H
L
H
L
H
L
H
Strobe
Y
S
H
L
L
L
L
L
L
L
L
L
D0
D1
D2
D3
D4
D5
D6
D7
H
D0
D1
D2
D3
D4
D5
D6
D7
W
Outputs
H
=
HIGH Level
L
=
LOW Level
X
=
Don't Care
D0 thru D7
=
the level of the respective D input
© 2000 Fairchild Semiconductor Corporation
DS006203
www.fairchildsemi.com
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