Dual-Core Intel
®
Xeon
®
Processor 5100 Series
Datasheet
August 2007
Reference Number: 313355-003
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The Dual-Core Intel
®
Xeon
®
Processor 5100 Series may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
64-bit Intel® Xeon
®
processors with Intel® EM64T requires a computer system with a processor, chipset, BIOS, OS, device drivers
and applications enabled for Intel EM64T. Processor will not operate (including 32-bit operation) without an Intel EM64T-enabled
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Copyright © 2007, Intel Corporation.
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Dual-Core Intel
®
Xeon
®
Processor 5100 Series
Datasheet
Contents
Features...................................................................................................................... 9
1
Introduction............................................................................................................... 11
1.1
Terminology ..................................................................................................... 12
1.2
State of Data .................................................................................................... 14
1.3
References ....................................................................................................... 14
Electrical Specifications ............................................................................................... 17
2.1
Front Side Bus and GTLREF ................................................................................ 17
2.2
Power and Ground Lands.................................................................................... 17
2.3
Decoupling Guidelines ........................................................................................ 18
2.3.1 VCC Decoupling...................................................................................... 18
2.3.2 VTT Decoupling ...................................................................................... 18
2.3.3 Front Side Bus AGTL+ Decoupling ............................................................ 18
2.4
Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ....................................... 18
2.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0]) .................................. 19
2.4.2 PLL Power Supply ................................................................................... 20
2.5
Voltage Identification (VID) ................................................................................ 20
2.6
Reserved or Unused Signals................................................................................ 23
2.7
Front Side Bus Signal Groups .............................................................................. 24
2.8
CMOS Asynchronous and Open Drain Asynchronous Signals .................................... 25
2.9
Test Access Port (TAP) Connection....................................................................... 25
2.10 Platform Environmental Control Interface (PECI) DC Specifications........................... 26
2.10.1 DC Characteristics .................................................................................. 26
2.10.2 Input Device Hysteresis .......................................................................... 27
2.11 Mixing Processors.............................................................................................. 27
2.12 Absolute Maximum and Minimum Ratings ............................................................. 27
2.13 Processor DC Specifications ................................................................................ 29
2.13.1 VCC Overshoot Specification .................................................................... 35
2.13.2 Die Voltage Validation ............................................................................. 36
Mechanical Specifications............................................................................................. 37
3.1
Package Mechanical Drawings ............................................................................. 37
3.2
Processor Component Keepout Zones................................................................... 41
3.3
Package Loading Specifications ........................................................................... 41
3.4
Package Handling Guidelines............................................................................... 42
3.5
Package Insertion Specifications.......................................................................... 42
3.6
Processor Mass Specifications ............................................................................. 42
3.7
Processor Materials............................................................................................ 43
3.8
Processor Land Coordinates ................................................................................ 43
Land Listing ............................................................................................................... 45
4.1
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Pin Assignments ............................. 45
4.1.1 Land Listing by Land Name ...................................................................... 45
4.1.2 Land Listing by Land Number ................................................................... 55
Signal Definitions ....................................................................................................... 65
5.1
Signal Definitions .............................................................................................. 65
Thermal Specifications ................................................................................................ 73
6.1
Package Thermal Specifications ........................................................................... 73
6.1.1 Thermal Specifications ............................................................................ 73
6.1.2 Thermal Metrology ................................................................................. 81
6.2
Processor Thermal Features ................................................................................ 82
6.2.1 Thermal Monitor Features........................................................................ 82
2
3
4
5
6
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Datasheet
3
6.3
6.2.2 On-Demand Mode ...................................................................................84
6.2.3 PROCHOT# Signal ..................................................................................85
6.2.4 FORCEPR# Signal ...................................................................................85
6.2.5 THERMTRIP# Signal ................................................................................86
Platform Environment Control Interface (PECI) ......................................................86
6.3.1 Introduction ...........................................................................................86
6.3.2 PECI Specifications .................................................................................88
7
Features ....................................................................................................................91
7.1
Power-On Configuration Options ..........................................................................91
7.2
Clock Control and Low Power States .....................................................................91
7.2.1 Normal State .........................................................................................92
7.2.2 HALT or Extended HALT State...................................................................92
7.2.3 Stop-Grant State ....................................................................................94
7.2.4 Extended HALT Snoop or HALT Snoop State,
Stop Grant Snoop State...........................................................................95
7.3
Enhanced Intel SpeedStep® Technology ...............................................................95
Boxed Processor Specifications .....................................................................................97
8.1
Introduction ......................................................................................................97
8.2
Mechanical Specifications ....................................................................................99
8.2.1 Boxed Processor Heat Sink Dimensions (CEK).............................................99
8.2.2 Boxed Processor Heat Sink Weight .......................................................... 107
8.2.3 Boxed Processor Retention Mechanism and Heat Sink
Support (CEK)...................................................................................... 107
8.3
Electrical Requirements .................................................................................... 107
8.3.1 Fan Power Supply (Active CEK)............................................................... 107
8.3.2 Boxed Processor Cooling Requirements.................................................... 108
8.4
Boxed Processor Contents................................................................................. 109
Debug Tools Specifications ......................................................................................... 111
9.1
Debug Port System Requirements ...................................................................... 111
9.2
Target System Implementation.......................................................................... 111
9.2.1 System Implementation......................................................................... 111
9.3
Logic Analyzer Interface (LAI) ........................................................................... 111
9.3.1 Mechanical Considerations ..................................................................... 112
9.3.2 Electrical Considerations ........................................................................ 112
2-1
2-2
2-3
2-4
2-5
2-6
2-7
3-1
3-2
3-3
3-4
3-5
3-6
6-1
Input Device Hysteresis ......................................................................................27
Dual-Core Intel® Xeon® Processor LV 5148/5138/5128
Processor Load Current versus Time .....................................................................31
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Load Current versus Time .................31
Dual-Core Intel® Xeon® Processor 5160 Load Current versus Time .........................32
Dual-Core Intel® Xeon® Processor 5100 Series VCC Static
and Transient Tolerance Load Line .......................................................................33
Dual-Core Intel® Xeon® Processor LV 5148/5138/5128 VCC
Static and Transient Tolerance Load Lines .............................................................34
VCC Overshoot Example Waveform ......................................................................36
Processor Package Assembly Sketch.....................................................................37
Processor Package Drawing (Sheet 1 of 3) ............................................................38
Processor Package Drawing (Sheet 2 of 3) ............................................................39
Processor Package Drawing (Sheet 3 of 3) ............................................................40
Processor Land Coordinates, Top View ..................................................................43
Processor Land Coordinates, Bottom View .............................................................44
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Thermal Profile ...............................76
8
9
Figures
4
Dual-Core Intel
®
Xeon
®
Processor 5100 Series
Datasheet
6-2
Dual-Core Intel® Xeon® Processor LV 5138
Nominal & Short-Term Thermal Profiles ................................................................ 77
6-3
Dual-Core Intel® Xeon® Processor LV 5148 and
Dual-Core Intel® Xeon® Processor LV 5128 Thermal Profile ................................... 79
6-4
Dual-Core Intel® Xeon® Processor 5160 Thermal Profiles A and B .......................... 80
6-5
Case Temperature (TCASE) Measurement Location ................................................ 82
6-6
Thermal Monitor 2 Frequency and Voltage Ordering ............................................... 84
6-7
PECI Topology .................................................................................................. 87
6-8
Temperature Data Format Comparison: Thermal Diode vs. PECI Digital
Thermal Sensor................................................................................................. 88
7-1
Stop Clock State Machine ................................................................................... 94
8-1
Boxed Dual-Core Intel
®
Xeon
®
Processor 5100 Series
1U Passive/3U+ Active Combination Heat Sink (With Removable Fan) ...................... 97
8-2
Boxed Dual-Core Intel
®
Xeon
®
Processor 5100 Series 2U Passive Heat Sink.............. 98
8-3
2U Passive Dual-Core Intel
®
Xeon
®
Processor 5100 Series
Thermal Solution (Exploded View) ....................................................................... 98
8-4
Top Side Board Keepout Zones (Part 1) .............................................................. 100
8-5
Top Side Board Keepout Zones (Part 2) .............................................................. 101
8-6
Bottom Side Board Keepout Zones..................................................................... 102
8-7
Board Mounting-Hole Keepout Zones ................................................................. 103
8-8
Volumetric Height Keep-Ins .............................................................................. 104
8-9
4-Pin Fan Cable Connector (For Active CEK Heat Sink) ......................................... 105
8-10 4-Pin Base Board Fan Header (For Active CEK Heat Sink)...................................... 106
8-11 Fan Cable Connector Pin Out for 4-Pin Active CEK Thermal Solution ....................... 108
Table
1-1
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
3-1
3-2
3-3
4-1
4-2
5-1
Dual-Core Intel
®
Xeon
®
Processor 5100 Series...................................................... 12
Core Frequency to FSB Multiplier Configuration ..................................................... 19
BSEL[2:0] Frequency Table ................................................................................ 19
Voltage Identification Definition........................................................................... 21
Voltage Identification Definition........................................................................... 22
Loadline Selection Truth Table for LL_ID[1:0] ....................................................... 23
Market Segment Selection Truth Table for MS_ID[1:0] ........................................... 23
FSB Signal Groups............................................................................................. 24
AGTL+ Signal Description Table........................................................................... 25
Non AGTL+ Signal Description Table .................................................................... 25
Signal Reference Voltages .................................................................................. 25
PECI DC Electrical Limits .................................................................................... 26
Processor Absolute Maximum Ratings................................................................... 28
Voltage and Current Specifications....................................................................... 29
VCC Static and Transient Tolerance ..................................................................... 32
AGTL+ Signal Group DC Specifications ................................................................. 34
CMOS Signal Group and TAP Signal Group DC Specifications ................................... 34
Open Drain Signal Group DC Specifications ........................................................... 35
VCC Overshoot Specifications.............................................................................. 35
Package Loading Specifications ........................................................................... 41
Package Handling Guidelines............................................................................... 42
Processor Materials............................................................................................ 43
Land Listing by Land Name ................................................................................. 45
Land Listing by Land Number .............................................................................. 55
Signal Definitions .............................................................................................. 65
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Datasheet
5
Analogue and Mixed Signal
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