The A8498 is a step-down regulator that will handle a wide
input operating voltage range.
The A8498 is supplied in a low-profile 8-lead SOIC with
exposed pad (package LJ).
Applications include:
• Applications with 8 to 50 V input voltage range needing
buck regulator for 3.0 A output current
• Consumer equipment power
• Uninterruptible power supplies (lead acid battery
charger)
• Automotive telematics: 9 to 16 V input, with higher
voltage protection
• 12 V lighter-powered applications (portable DVD, etc.)
• Point of Sale (POS) applications
• Industrial applications with 24 or 36 V bus
DESCRIPTION
PACKAGE: 8-Lead SOIC with Exposed
Thermal Pad (suffix LJ)
Approximate Footprint
+42
V
CBOOT
0.01 µF
Efficiency vs. Output Current
CIN2
220 µF
50 V
CIN1
0.22 µF
BOOT
VIN
ENB
A8498
LX
L1
68 µH
VOUT
3.3 V / 3 A
TSET
RTSET
63.4 kΩ
GND
VBIAS
R1
6.34 kΩ
FB
D1
R2
2 kΩ
ESR
COUT
220 µF
25 V
90.0
88.0
86.0
84.0
82.0
80.0
78.0
76.0
74.0
72.0
70.0
0
500
1000
1500
2000
Efficiency %
V
OUT
(V)
5
3.3
2500
3000
I
OUT
(mA)
Circuit for 42 V step down to 3.3 V at 3 A. Efficiency data from circuit shown in left panel. Data is for reference only.
Typical Application
A8498-DS, Rev. 8
MCO-0000859
May 14, 2020
A8498
Wide Input Voltage 3.0 A Step-Down Regulator
SPECIFICATIONS
Ordering Information
Use the following complete part numbers when ordering:
Part Number
a
A8498SLJTR-T
a
Leadframe
b
Contact Allegro
Packing
b
13 in. reel, 3000 pieces/reel
Description
LJ package, SOIC surface mount with
exposed thermal pad
plating 100% matte tin.
for additional packing options.
Absolute Maximum Ratings
Characteristic
Load Supply Voltage, VIN pin
Input Voltage, VBIAS pin
Switching Voltage
Input Voltage Range, ENB pin
Operating Ambient Temperature Range
Junction Temperature
Storage Temperature
Symbol
V
IN
V
BIAS
V
S
V
ENB
T
A
T
J
(max)
T
S
Conditions
Min.
–
–0.3
–1
–0.3
–20
–
–55
Typ.
–
–
–
–
–
–
–
Max.
50
7
–
7
85
150
150
Units
V
V
V
V
°C
°C
°C
*Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current ratings, or a
junction temperature, T
J
, of 150°C.
Package Thermal Characteristics*
Package
LJ
* Additional information is available on the Allegro website.
R
θJA
(°C/W)
35
PCB
4-layer
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
2
A8498
Wide Input Voltage 3.0 A Step-Down Regulator
Terminal List Table
BOOT
ENB
TSET
GND
1
2
3
4
Pad
8
7
6
5
VIN
LX
VBIAS
FB
Number
1
2
3
4
5
6
7
8
Name
BOOT
ENB
TSET
GND
FB
VBIAS
LX
VIN
Description
Gate drive boost node
On/off control; logic input
Off-time setting
Ground
Feedback for adjustable regulator
Bias supply input
Buck switching node
Supply input
Package LJ, 8-Pin SOIC Pinout Diagram
BOOT
Boot Charge
VIN
V
IN
+
LX
L1
D1
ESR
COUT
VOUT
µC
ENB
Switch
Disable
Switch PWM Control
TSET
I_Peak
+
–
I_Demand
Error
+
COMP
GND
VBB UVLO
TSD
Soft Start
Ramp Generation
Functional Block Diagram
–
Clamp
–
FB
Bias Supply
VBIAS
VBIAS is connected to VOUT
when V
OUT
target is between
3.3 and 5 V
0.8 V
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
3
A8498
Wide Input Voltage 3.0 A Step-Down Regulator
ELECTRICAL CHARACTERISTICS
1,2
at T
A
= 25°C, V
IN
= 8 to 50 V (unless noted otherwise)
Characteristics
Symbol
Test Conditions
V
ENB
= LOW, V
IN
= 42 V, V
BIAS
= 3.2 V,
V
FB
= 1.5 V (not switching)
VIN Quiescent Current
I
VIN(Q)
V
ENB
= LOW, V
IN
= 42 V, V
BIAS
< 3 V,
V
FB
= 1.5 V
V
ENB
= HIGH
VBIAS Input Current
Buck Switch On Resistance
Fixed Off-Time Proportion
Feedback Voltage
Output Voltage Regulation
Feedback Input Bias Current
Soft Start Time
Buck Switch Current Limit
ENB Open Circuit Voltage
ENB Input Voltage Threshold
ENB Input Current
VIN Undervoltage Threshold
VIN Undervoltage Hysteresis
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
1
Negative
2
Specifications
Min.
–
–
–
–
–
–
–15
0.784
–3
–400
5
Typ.
0.90
4.4
–
3.5
450
650
–
0.8
–
–100
10
–
–
–
–
–
6.9
–
165
15
Max.
1.35
6.35
100
5
–
–
15
0.816
3
100
15
5
1.5
7
1.0
–1
7.2
1.1
–
–
Units
mA
mA
µA
mA
mΩ
mΩ
%
V
%
nA
ms
A
A
V
V
µA
V
V
°C
°C
I
BIAS
R
DS(on)
V
BIAS
= V
OUT
T
A
= 25°C, I
OUT
= 3 A
T
A
= 125°C, I
OUT
= 3 A
Based on calculated value
V
FB
V
OUT
I
FB
t
ss
I
CL
V
OC
V
ENB(0)
I
ENB(0)
V
UVLO
V
UVLO(hys)
T
JTSD
T
JTSD(hys)
V
FB
> 0.4 V
V
FB
< 0.4 V
Output disabled
LOW level input (Logic 0), output enabled
V
ENB
= 0 V
V
IN
rising
V
IN
falling
Temperature increasing
Recovery = T
JTSD
– T
JTSD(hys)
I
OUT
= 0 mA to 3 A
3.5
0.5
2.0
–
–10
6.6
0.7
–
–
current is defined as coming out of (sourcing) the specified device pin.
over the junction temperature range of 0ºC to 125ºC are assured by design and characterization.
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
4
A8498
Wide Input Voltage 3.0 A Step-Down Regulator
FUNCTIONAL DESCRIPTION
The A8498 is a fixed off-time, current-mode–controlled buck
switching regulator. The regulator requires an external clamping
diode, inductor, and filter capacitor, and operates in both continu-
ous and discontinuous modes. An internal blanking circuit is used
to filter out transients resulting from the reverse recovery of the
external clamp diode. Typical blanking time is 200 ns.
The value of a resistor between the TSET pin and ground deter-
mines the fixed off-time (see graph in the t
OFF
section).
V
OUT
.
The output voltage is adjustable from 0.8 to 24 V, based on
the combination of the value of the external resistor divider and
the internal 0.8 V ±2% reference. The voltage can be calculated
with the following formula:
V
OUT
= V
FB
× (1 + R1/R2)
(1)
with an internal supply and pay a penalty in efficiency, as the bias
current will come from the high voltage supply, VIN. VBIAS can
also be supplied with an external voltage source. No power-up
sequencing is required for normal operation.
ON/OFF Control
The ENB pin is externally pulled to ground to enable the device
and begin the soft start sequence. When the ENB is open cir-
cuited, the switcher is disabled and the output decays to 0 V.
Protection
The buck switch will be disabled under one or more of the fol-
lowing fault conditions:
• V
IN
< 6 V
• ENB pin = open circuit
• TSD fault
When the device comes out of a TSD fault, it will go into a soft
start to limit inrush current.
Light Load Regulation
To maintain voltage regulation during light load conditions, the
switching regulator enters a cycle-skipping mode. As the output
current decreases, there remains some energy that is stored during
the power switch minimum on-time. In order to prevent the out-
put voltage from rising, the regulator skips cycles once it reaches
the minimum on-time, effectively making the off-time larger.
t
OFF
The value of a resistor between the TSET pin and ground deter-
mines the fixed off-time. The formula to calculate t
OFF
(µs) is:
Soft Start
An internal ramp generator and counter allow the output to
slowly ramp up. This limits the maximum demand on the external
power supply by controlling the inrush current required to charge
the external capacitor and any dc load at startup. Internally, the
ramp is set to 10 ms nominal rise time. During soft start, current
limit is 3.5 A minimum.
The following conditions are required to trigger a soft start:
• V
IN
> 6 V
• Reset of a TSD (thermal shut down) event
• ENB pin input falling edge
where R
TSET
(kΩ) is the value of the resistor. Results are shown
in the following graph:
Off-Time Setting versus Resistor Value
200
180
160
1–0.03
V
BIAS
,
t
OFF
=
R
TSET
10.2 × 10
9
(2)
R
TSET
(kΩ)
140
120
100
80
60
40
20
0
1
2
3
4
5
V
BIAS
= 5 V
V
BIAS
= 3.3 V
V
BIAS
To improve overall system efficiency, the regulator output, V
OUT
,
is connected to the VBIAS input to supply the operating bias
current during normal operating conditions. During startup the
circuitry is run off the VIN supply. VBIAS should be connected
to VOUT when the V
OUT
target level is between 3.3 and 5 V. If
the output voltage is less than 3.3 V, then the A8498 can operate
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