MR0D08B
FEATURES
• +3.3 Volt power supply
• I/O Voltage range supports wide +1.65 to +3.6 Volt interfaces
• Fast 45 ns read/write cycle
• SRAM compatible timing
• Unlimited read & write endurance
• Data always non-volatile for >20-years at temperature
• RoHS-compliant small footprint BGA package
Dual Supply 128K x 8 MRAM
BENEFITS
• One memory replaces FLASH, SRAM, EEPROM and BBSRAM in systems
for simpler, more efficient designs
• Improves reliability by replacing battery-backed SRAM
RoHS
INTRODUCTION
The
MR0D08B
is a dual power supply 1,048,576-bit magnetoresistive random access memory (MRAM) de-
vice organized as 131,072 words of 8 bits. It supports I/O voltages from +1.65 to +3.6 volts. The MR0D08B
offers SRAM compatible 45ns read/write timing with unlimited endurance. Data is always non-volatile for
greater than 20-years. Data is automatically protected on power loss by low-voltage inhibit circuitry to pre-
vent writes with voltage out of specification. The MR0D08B is the ideal memory solution for applications
that must permanently store and retrieve critical data and programs quickly.
The
MR0D08B
is available in small footprint 8 mm x 8 mm, 48-pin ball grid array (BGA) package with 0.75
mm ball centers.
The
MR0D08B
provides highly reliable data storage over a wide range of temperatures. The product is of-
fered with commercial temperature (0 to +70 °C).
CONTENTS
1. DEVICE PIN ASSIGNMENT......................................................................... 2
2. ELECTRICAL SPECIFICATIONS................................................................. 4
3. TIMING SPECIFICATIONS.......................................................................... 8
4. ORDERING INFORMATION....................................................................... 13
5. MECHANICAL DRAWING.......................................................................... 14
6. REVISION HISTORY...................................................................................... 15
How to Reach Us.......................................................................................... 15
Copyright © Everspin Technologies 2018
2015
1
MR0D08B Rev. 3.3, 3/2018
MR0D08B
1. DEVICE PIN ASSIGNMENT
Figure 1.1 Block Diagram
G
OUTPUT
ENABLE
BUFFER
7
10
ROW
DECODER
COLUMN
DECODER
OUTPUT ENABLE
A[16:0]
17
ADDRESS
BUFFER
E
CHIP
ENABLE
BUFFER
128Kx 8 BIT
MEMORY
ARRAY
8
SENSE
AMPS
8
OUTPUT
BUFFER
8
W
WRITE
ENABLE
BUFFER
8
FINAL
WRITE
DRIVERS
8
WRITE
DRIVER
8
DQ[7:0]
WRITE ENABLE
Table 1.1 Pin Functions
Signal Name
A
E
W
G
DQ
V
DD
V
DDQ
V
SS
DC
NC
Function
Address Input
Chip Enable
Write Enable
Output Enable
Data I/O
Power Supply
I/O Power Supply
Ground
Do Not Connect
No Connection, Ball D3, H1, H6, G2 Reserved for Future Expansion
Copyright © Everspin Technologies 2018
2
MR0D08B Rev. 3.3, 3/2018
DEVICE PIN ASSIGNMENT
MR0D08B
Figure 1.2 Pin Diagrams for Available Packages (Top View)
1
DC
NC
DQ
2
G
DC
V
DD
DQ
DQ
3
A
A
A
NC
DC
4
A
A
A
A
5
A
E
NC
DQ
DQ
6
V
DD
DC
DQ
A
B
C
D
E
F
G
H
V
SS
V
DDQ
DQ
3
V
DDQ
V
SS
DQ
NC
NC
A
A
A
A
A
NC
W
A
NC
NC
NC
NC
48 Pin FBGA
Table 1.2 Operating Modes
E
1
H
L
L
L
1
2
G
1
X
H
L
X
W
1
X
H
H
L
Mode
Not selected
Output disabled
Byte Read
Byte Write
V
DD
Current
I
SB1
, I
SB2
I
DDR
I
DDR
I
DDW
DQ[7:0]
2
Hi-Z
Hi-Z
D
Out
D
in
H = high, L = low, X = don’t care
Hi-Z = high impedance
Copyright © Everspin Technologies 2018
3
MR0D08B Rev. 3.3, 3/2018
MR0D08B
2. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
This device contains circuitry to protect the inputs against damage caused by high static voltages or
electric fields; however, it is advised that normal precautions be taken to avoid application of any
voltage greater than maximum rated voltages to these high-impedance (Hi-Z) circuits.
The device also contains protection against external magnetic fields. Precautions should be taken
to avoid application of any magnetic field more intense than the maximum field intensity specified
in the maximum ratings.
Table 2.1 Absolute Maximum Ratings
1
Parameter
Core Supply voltage
2
I/O Power Supply voltage
2
Voltage on any pin
2
Output current per pin
Package power dissipation
3
Temperature under bias
Storage Temperature
Lead temperature during solder (3 minute max)
Maximum magnetic field during write
Maximum magnetic field during read or standby
1
Symbol
V
DD
V
DDQ
V
IN
Value
-0.5 to 4.0
-0.5 to 4.0
-0.5 to +4.0 or
V
DDQ
+ 0.5
whichever is less
Unit
V
V
V
mA
W
°C
°C
°C
A/m
A/m
I
OUT
P
D
T
BIAS
T
stg
T
Lead
H
max_write
H
max_read
±20
0.600
-10 to 85
-55 to 150
260
2000
8000
Permanent device damage may occur if absolute maximum ratings are exceeded. Functional opera-
tion should be restricted to recommended operating conditions. Exposure to excessive voltages or
magnetic fields could affect device reliability.
All voltages are referenced to V
SS
.
Power dissipation capability depends on package characteristics and use environment.
2
3
Copyright © Everspin Technologies 2018
4
MR0D08B Rev. 3.3, 3/2018
Electrical Specifications
Table 2.2 Operating Conditions
Parameter
Core Power supply voltage
I/O Power supply voltage
Write inhibit voltage
Write inhibit voltage
Input high voltage (V
DDQ
=1.65-2.2V)
Input high voltage (V
DDQ
=2.2-2.7V)
Input high voltage (V
DDQ
=2.7-3.6V)
Input low voltage (V
DDQ
=1.65-2.2V)
Input low voltage (V
DDQ
=2.2-2.7V)
Input low voltage (V
DDQ
=2.7-3.6V)
Temperature under bias
1
MR0D08B
Symbol
V
DD
V
DDQ
V
WIDD
V
WIDDQ
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
T
A
Min
3.0
1
1.65
1
2.5
1.2
1.4
1.8
2.2
-0.2
3
-0.2
3
-0.2
3
0
Typical
3.3
-
2.7
1.4
-
-
-
-
-
-
Max
3.6
3.6
3.0
1
1.65
1
V
DDQ
+ 0.2
2
V
DDQ
+ 0.2
2
V
DDQ
+ 0.2
2
0.4
0.6
0.8
70
Unit
V
V
V
V
V
V
V
V
V
V
°C
2
3
V
DDQ
≤V
DD
. Write inhibit occurs when either V
DD
or V
DDQ
drops below its write inhibit voltage. There is a 2 ms startup time once
V
DD
exceeds V
DD
(min). See
Power Up and Power Down Sequencing.
V
IH
(max) = V
DDQ
+ 0.2 V DC ; V
IH
(max) = V
DDQ
+ 0.5 V AC (pulse width ≤ 20 ns) for I ≤ 20.0 mA.
V
IL
(min) = -0.2 V DC ; V
IL
(min) = -2.0 V AC (pulse width ≤ 20 ns) for I ≤ 20.0 mA.
Copyright © Everspin Technologies 2018
5
MR0D08B Rev. 3.3, 3/2018
京公网安备 11010802033920号
EEWORLD
