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551SCMGI

CategoryAnalog mixed-signal IC    The clock buffer, drive   
File Size206KB,12 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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Low Skew 1 to 4 Clock Buffer
551S
DATASHEET
Description
The 551S is a low cost, high-speed single input to four output
clock buffer.
The
551S
has best in class Additive Phase Jitter
of sub 50fsec.
IDT makes many non-PLL and PLL based low skew output
devices as well as Zero Delay Buffers to synchronize clocks.
Contact IDT for all of your clocking needs.
Features
Low additive phase jitter RMS: 50fs
Extremely low skew outputs (50ps)
Low cost clock buffer
Packaged in 8-pin SOIC and 8-pin DFN, Pb-free
Input/Output clock frequency up to 200 MHz
Non-inverting output clock
Ideal for networking clocks
Operating Voltages: 1.8V to 3.3V
Output Enable mode tri-states outputs
Advanced, low power CMOS process
Extended temperature range (-40°C to +105°C)
Block Diagram
Q1
Q2
ICLK
Q3
Q4
Output Enable
551S REVISION A 03/18/15
1
©2015 Integrated Device Technology, Inc.

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