ATTINY2313V-10SU datasheet, PDF

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ATTINY2313V-10SU: DescriptionAVR Microcontroller IC series 8-bit 10MHz 2KB (1K x 16) Flash Memory; CategoryThe embedded processor and controller Microcontrollers and processors; File Size376KB，20 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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ATTINY2313V-10SU Overview

AVR Microcontroller IC series 8-bit 10MHz 2KB (1K x 16) Flash Memory

ATTINY2313V-10SU Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
package instruction	SOP, SOP20,.4
Reach Compliance Code	compliant
Has ADC	NO
Other features	OPERATES AT 1.8 V MINIMUM SUPPLY AT 4 MHZ
Address bus width
bit size	8
CPU series	AVR RISC
maximum clock frequency	10 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	R-PDSO-G20
JESD-609 code	e3
length	12.8 mm
Humidity sensitivity level	2
Number of I/O lines	18
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP20,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	250
power supply	2/5 V
Certification status	Not Qualified
RAM (bytes)	128
rom(word)	2048
ROM programmability	FLASH
Maximum seat height	2.65 mm
speed	10 MHz
Maximum slew rate	6 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	2.7 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	7.5 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC
Base Number Matches	1

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Features

•

Utilizes the AVR

RISC Architecture

•

AVR – High-performance and Low-power RISC Architecture

– 120 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 20 MIPS Throughput at 20 MHz

Data and Non-volatile Program and Data Memories

– 2K Bytes of In-System Self Programmable Flash

Endurance 10,000 Write/Erase Cycles

– 128 Bytes In-System Programmable EEPROM

Endurance: 100,000 Write/Erase Cycles

– 128 Bytes Internal SRAM

– Programming Lock for Flash Program and EEPROM Data Security

Peripheral Features

– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes

– Four PWM Channels

– On-chip Analog Comparator

– Programmable Watchdog Timer with On-chip Oscillator

– USI – Universal Serial Interface

– Full Duplex USART

Special Microcontroller Features

– debugWIRE On-chip Debugging

– In-System Programmable via SPI Port

– External and Internal Interrupt Sources

– Low-power Idle, Power-down, and Standby Modes

– Enhanced Power-on Reset Circuit

– Programmable Brown-out Detection Circuit

– Internal Calibrated Oscillator

I/O and Packages

– 18 Programmable I/O Lines

– 20-pin PDIP, 20-pin SOIC, 20-pad QFN/MLF

Operating Voltages

– 1.8 – 5.5V (ATtiny2313V)

– 2.7 – 5.5V (ATtiny2313)

Speed Grades

– ATtiny2313V: 0 – 4 MHz @ 1.8 - 5.5V, 0 – 10 MHz @ 2.7 – 5.5V

– ATtiny2313: 0 – 10 MHz @ 2.7 - 5.5V, 0 – 20 MHz @ 4.5 – 5.5V

Typical Power Consumption

– Active Mode

1 MHz, 1.8V: 230 µA

32 kHz, 1.8V: 20 µA (including oscillator)

– Power-down Mode

< 0.1 µA at 1.8V

•

8-bit

Microcontroller

with 2K Bytes

In-System

Programmable

Flash

ATtiny2313/V

Summary

•

Rev. 2543MS–AVR–10/16

The AVR core combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs up to ten times faster than con-

ventional CISC microcontrollers.

The ATtiny2313 provides the following features: 2K bytes of In-System Programmable Flash,

128 bytes EEPROM, 128 bytes SRAM, 18 general purpose I/O lines, 32 general purpose work-

ing registers, a single-wire Interface for On-chip Debugging, two flexible Timer/Counters with

compare modes, internal and external interrupts, a serial programmable USART, Universal

Serial Interface with Start Condition Detector, a programmable Watchdog Timer with internal

Oscillator, and three software selectable power saving modes. The Idle mode stops the CPU

while allowing the SRAM, Timer/Counters, and interrupt system to continue functioning. The

Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip

functions until the next interrupt or hardware reset. In Standby mode, the crystal/resonator Oscil-

lator is running while the rest of the device is sleeping. This allows very fast start-up combined

with low-power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The

On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI

serial interface, or by a conventional non-volatile memory programmer. By combining an 8-bit

RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATtiny2313

is a powerful microcontroller that provides a highly flexible and cost effective solution to many

embedded control applications.

The ATtiny2313 AVR is supported with a full suite of program and system development tools

including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,

and Evaluation kits.

ATtiny2313

2543MS–AVR–10/16

ATtiny2313

Pin Descriptions

VCC

GND

Port A (PA2..PA0)

Digital supply voltage.

Ground.

Port A is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port A output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port A also serves the functions of various special features of the ATtiny2313 as listed on

page

53.

Port B (PB7..PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B also serves the functions of various special features of the ATtiny2313 as listed on

page

53.

Port D (PD6..PD0)

Port D is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port D also serves the functions of various special features of the ATtiny2313 as listed on

page

56.

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running. The minimum pulse length is given in

Table 15 on page

34.

Shorter pulses are not guaranteed to generate a reset. The Reset Input is an alternate func-

tion for PA2 and dW.

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL1

is an alternate function for PA0.

Output from the inverting Oscillator amplifier. XTAL2 is an alternate function for PA1.

XTAL1

XTAL2

2543MS–AVR–10/16

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