M74VHC1GT126DT1G datasheet, PDF

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M74VHC1GT126DT1G: DescriptionLogic circuit family: 74VHC Logic type: buffer, non-inverting number of components: 1 Number of bits per component: 1; Categorylogic logic; File Size128KB，6 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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M74VHC1GT126DT1G Overview

Logic circuit family: 74VHC Logic type: buffer, non-inverting number of components: 1 Number of bits per component: 1

M74VHC1GT126DT1G Parametric

Parameter Name	Attribute value
Brand Name	ON Semiconductor
Is it lead-free?	Lead free
Maker	ON Semiconductor
Parts packaging code	TSOP
package instruction	TSOP-5
Contacts	5
Manufacturer packaging code	483
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
Samacsys Description	NULL
Control type	ENABLE HIGH
series	AHC/VHC
JESD-30 code	R-PDSO-G5
JESD-609 code	e3
length	3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.008 A
Humidity sensitivity level	1
Number of digits	1
Number of functions	1
Number of ports	2
Number of terminals	5
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP
Encapsulate equivalent code	TSOP5/6,.11,37
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	3.3/5 V
Maximum supply current (ICC)	0.04 mA
Prop。Delay @ Nom-Sup	10.5 ns
propagation delay (tpd)	16 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	1.5 mm

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MC74VHC1GT126

Noninverting Buffer /

CMOS Logic Level Shifter

with LSTTL−Compatible Inputs

The MC74VHC1GT126 is a single gate noninverting 3−state buffer

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while maintaining

CMOS low power dissipation.

The MC74VHC1GT126 requires the 3−state control input (OE) to be

set Low to place the output into the high impedance state.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input

protection circuitry on this device allows overvoltage tolerance on the

input, allowing the device to be used as a logic−level translator from

3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to

3 V CMOS Logic while operating at the high−voltage power supply.

The MC74VHC1GT126 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT126 to be used to interface 5 V circuits to

3 V circuits. The output structures also provide protection when

= 0 V. These input and output structures help prevent device

destruction caused by supply voltage

−

input/output voltage mismatch,

battery backup, hot insertion, etc.

Features

http://onsemi.com

MARKING

DIAGRAMS

SC−88A / SOT−353 / SC−70

DF SUFFIX

CASE 419A

W3 M

TSOP−5 / SOT−23 / SC−59

DT SUFFIX

CASE 483

W3 M

•

High Speed: t

= 3.5 ns (Typ) at V

= 5 V

Low Power Dissipation: I

= 1

(Max) at T

= 25°C

TTL−Compatible Inputs: V

= 0.8 V; V

= 2 V

CMOS−Compatible Outputs: V

> 0.8 V

; V

< 0.1 V

@Load

Power Down Protection Provided on Inputs and Outputs

Balanced Propagation Delays

Pin and Function Compatible with Other Standard Logic Families

= Device Code

= Date Code*

= Pb−Free Package

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary

depending upon manufacturing location.

PIN ASSIGNMENT

IN A

GND

OUT Y

Chip Complexity: FETs = 62; Equivalent Gates = 16

NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

•

These Devices are Pb−Free and are RoHS Compliant

IN A

GND

4 OUT Y

5 V

FUNCTION TABLE

A Input

OE Input

Y Output

Figure 1. Pinout

(Top View)

IN A

OUT Y

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Figure 2. Logic Symbol

Semiconductor Components Industries, LLC, 2012

May, 2012

−

Rev. 15

Publication Order Number:

MC74VHC1GT126/D

M74VHC1GT126DT1G Related Products

	M74VHC1GT126DT1G	NLVVHC1GT126DF1G
Description	Logic circuit family: 74VHC Logic type: buffer, non-inverting number of components: 1 Number of bits per component: 1	Logic circuit family: Automotive grade, AEC-Q100 Logic type: Buffer, non-inverting Number of components: 1 Number of bits per component: 1

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