NLVVHC1GT126DF1G datasheet, PDF

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NLVVHC1GT126DF1G: DescriptionLogic circuit family: Automotive grade, AEC-Q100 Logic type: Buffer, non-inverting Number of components: 1 Number of bits per component: 1; Categorylogic Logic - buffer, drives, receiver, transceiver; File Size128KB，6 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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NLVVHC1GT126DF1G Overview

Logic circuit family: Automotive grade, AEC-Q100 Logic type: Buffer, non-inverting Number of components: 1 Number of bits per component: 1

NLVVHC1GT126DF1G Parametric

Parameter Name	Attribute value
input type	-
Operating temperature	-55℃~+125℃（TA）
Current - output high, low	8mA、8mA
Output type	Three states
Logic circuit family	Automotive grade, AEC-Q100
logical type	Buffer, non-inverting
Number of components	1
bits per component	1
voltage	3 V ~ 5.5 V

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MC74VHC1GT126

Noninverting Buffer /

CMOS Logic Level Shifter

with LSTTL−Compatible Inputs

The MC74VHC1GT126 is a single gate noninverting 3−state buffer

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while maintaining

CMOS low power dissipation.

The MC74VHC1GT126 requires the 3−state control input (OE) to be

set Low to place the output into the high impedance state.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input

protection circuitry on this device allows overvoltage tolerance on the

input, allowing the device to be used as a logic−level translator from

3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to

3 V CMOS Logic while operating at the high−voltage power supply.

The MC74VHC1GT126 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT126 to be used to interface 5 V circuits to

3 V circuits. The output structures also provide protection when

= 0 V. These input and output structures help prevent device

destruction caused by supply voltage

−

input/output voltage mismatch,

battery backup, hot insertion, etc.

Features

http://onsemi.com

MARKING

DIAGRAMS

SC−88A / SOT−353 / SC−70

DF SUFFIX

CASE 419A

W3 M

TSOP−5 / SOT−23 / SC−59

DT SUFFIX

CASE 483

W3 M

•

High Speed: t

= 3.5 ns (Typ) at V

= 5 V

Low Power Dissipation: I

= 1

(Max) at T

= 25°C

TTL−Compatible Inputs: V

= 0.8 V; V

= 2 V

CMOS−Compatible Outputs: V

> 0.8 V

; V

< 0.1 V

@Load

Power Down Protection Provided on Inputs and Outputs

Balanced Propagation Delays

Pin and Function Compatible with Other Standard Logic Families

= Device Code

= Date Code*

= Pb−Free Package

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary

depending upon manufacturing location.

PIN ASSIGNMENT

IN A

GND

OUT Y

Chip Complexity: FETs = 62; Equivalent Gates = 16

NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

•

These Devices are Pb−Free and are RoHS Compliant

IN A

GND

4 OUT Y

5 V

FUNCTION TABLE

A Input

OE Input

Y Output

Figure 1. Pinout

(Top View)

IN A

OUT Y

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Figure 2. Logic Symbol

Semiconductor Components Industries, LLC, 2012

May, 2012

−

Rev. 15

Publication Order Number:

MC74VHC1GT126/D

NLVVHC1GT126DF1G Related Products

	NLVVHC1GT126DF1G	M74VHC1GT126DT1G
Description	Logic circuit family: Automotive grade, AEC-Q100 Logic type: Buffer, non-inverting Number of components: 1 Number of bits per component: 1	Logic circuit family: 74VHC Logic type: buffer, non-inverting number of components: 1 Number of bits per component: 1

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