STL33N60DM2
N-channel 600 V, 0.115 Ω typ., 21 A MDmesh™ DM2
Power MOSFET in a PowerFLAT™ 8x8 HV package
Datasheet - production data
Features
Order code
V
DS
@
T
Jmax
650 V
R
DS(on)
max
0.140 Ω
I
D
21 A
5
4
3
STL33N60DM2
2
1
PowerFLAT™ 8x8 HV
Fast-recovery body diode
Extremely low gate charge and input
capacitance
Low on-resistance
100% avalanche tested
Extremely high dv/dt ruggedness
Zener-protected
Figure 1: Internal schematic diagram
Applications
Switching applications
Description
This high voltage N-channel Power MOSFET is
part of the MDmesh™ DM2 fast recovery diode
series. It offers very low recovery charge (Q
rr
)
and time (t
rr
) combined with low R
DS(on)
, rendering
it suitable for the most demanding high efficiency
converters and ideal for bridge topologies and
ZVS phase-shift converters.
Table 1: Device summary
Order code
STL33N60DM2
Marking
33N60DM2
Package
PowerFLAT™ 8x8 HV
Packaging
Tape and reel
March 2016
DocID026781 Rev 2
1/15
www.st.com
This is information on a product in full production.
Contents
STL33N60DM2
Contents
1
2
3
4
Electrical ratings ............................................................................. 3
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
Test circuits ..................................................................................... 8
Package mechanical data ............................................................... 9
4.1
4.2
PowerFLAT™ 8x8 HV package mechanical data ........................... 10
PowerFLAT™ 8x8 HV packing information ..................................... 12
5
Revision history ............................................................................ 14
2/15
DocID026781 Rev 2
STL33N60DM2
Electrical ratings
1
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM
(1)
(1)
Parameter
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Avalanche current, repetitive or not-repetitive (pulse width limited by
T
j
max)
Single pulse avalanche energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
± 25
21
15
84
150
4.5
570
50
50
- 55 to 150
Unit
V
A
A
A
W
A
mJ
V/ns
V/ns
°C
(1) (2)
,
P
TOT
I
AR
(1)
E
AS
dv/dt
dv/dt
T
stg
T
j
Notes:
(1)
(2)
(3)
(4)
(3)
(4)
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
The value is rated according to R
thj-case
and limited by package.
Pulse width limited by safe operating area.
I
SD
≤ 21 A, di/dt ≤ 900 A/µs, V
DS(peak)
< V
(BR)DSS
, V
DD
= 400 V.
V
DS
≤ 480 V.
Table 3: Thermal data
Symbol
R
thj-case
R
thj-amb
Notes:
(1)
(1)
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Value
0.83
45
Unit
°C/W
°C/W
When mounted on FR-4 board of inch², 2oz Cu.
DocID026781 Rev 2
3/15
Electrical characteristics
STL33N60DM2
2
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4: On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source
breakdown voltage
Zero gate voltage
drain current
Gate-body leakage
current
Gate threshold
voltage
Static drain-source
on- resistance
Test conditions
V
GS
= 0, I
D
= 1 mA
V
GS
= 0, V
DS
= 600 V
V
GS
= 0,
(1)
V
DS
= 600 V, T
C
=125 °C
V
DS
= 0, V
GS
= ± 25 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 10.5 A
3
4
0.115
Min.
600
1
100
±10
5
0.140
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Notes:
(1)
Defined by design, not subject to production test.
Table 5: Dynamic
Symbol
C
iss
C
oss
C
rss
C
oss eq.
R
G
Q
g
Q
gs
Q
gd
Notes:
(1)
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
V
DSS
.
(1)
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Intrinsic gate
resistance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
Min.
-
Typ.
1870
87
2
157
4.5
43
9.8
21.4
Max.
-
-
-
-
-
-
-
-
Unit
pF
pF
pF
pF
Ω
nC
nC
nC
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0
-
-
V
DS
= 0 to 480 V, V
GS
= 0
f = 1 MHz, I
D
=0 A
V
DD
= 480 V, I
D
= 21 A
V
GS
= 10 V
(see
Figure 15: "Gate
charge test circuit")
-
-
-
-
-
4/15
DocID026781 Rev 2
STL33N60DM2
Table 6: Switching times
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 300 V, I
D
= 10.5 A
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 14: "Switching
times test circuit for resistive
load")
Table 7: Source drain diode
Symbol
I
SD
I
SDM
(1)
Electrical characteristics
Min.
-
-
-
-
Typ.
17
8
62
9
Max.
-
-
-
-
Unit
ns
ns
ns
ns
Parameter
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery
charge
Reverse recovery
current
Reverse recovery time
Reverse recovery
charge
Reverse recovery
current
Test conditions
Min.
-
-
Typ.
Max.
21
84
1.6
Unit
A
A
V
ns
µC
A
ns
µC
A
(1)(2)
V
SD
t
rr
(3)
I
SD
= 21 A, V
GS
= 0
I
SD
= 21 A, di/dt = 100 A/µs
V
DD
= 100 V (see
Figure 16: " Test
circuit for inductive load switching
and diode recovery times")
I
SD
= 21 A, di/dt = 100 A/µs
V
DD
= 100 V, T
j
= 150 °C
(see
Figure 16: " Test circuit for
inductive load switching and diode
recovery times")
-
-
-
-
-
-
-
120
0.53
8.8
316
2.85
18
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Notes:
(1)
(2)
(3)
The value is rated according to R
thj-case
and limited by package.
Pulse width limited by safe operating area
Pulsed: pulse duration = 300 μs, duty cycle 1.5%
Table 8: Gate-source Zener diode
Symbol
V
(BR)GSO
Parameter
Gate-source breakdown voltage
Test conditions
I
GS
= ±250 µA, I
D
= 0 A
Min.
±30
Typ.
-
Max.
-
Unit
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection,thus eliminating the need for additional external componentry.
DocID026781 Rev 2
5/15
Embedded System
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