STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
N-channel 1200 V, 0.62 Ω typ.,12 A MDmesh K5 Power MOSFETs
in H²PAK-2, TO-220, TO-247 and TO-247 long leads
Datasheet - production data
Features
Order codes
STH12N120K5-2
2
H PAK-2
TO-220
V
DS
R
DS(on)
max.
I
D
P
TOT
STP12N120K5
STW12N120K5
STWA12N120K5
1200 V
0.69 Ω
12 A 250 W
2
1
TO-247
3
2
1
TO-247 long leads
3
Worldwide best FOM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Figure 1: Internal schematic diagram
D(TAB)
D(2, TAB)
Applications
Switching applications
Description
G(1)
G(1)
These very high voltage N-channel Power
MOSFETs are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
S(3)
( TO-220, TO-247 and
TO-247 long leads)
S(2, 3)
(H PAK-2)
2
Table 1: Device summary
Order code
STH12N120K5-2
STP12N120K5
STW12N120K5
STWA12N120K5
12N120K5
Marking
Package
H PAK-2
TO-220
TO-247
TO-247 long leads
Tube
2
Packing
Tape and reel
April 2015
DocID022133 Rev 4
1/21
www.st.com
This is information on a product in full production.
Contents
STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
Contents
1
2
3
4
Electrical ratings ............................................................................. 3
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
Test circuits ..................................................................................... 9
Package information ..................................................................... 10
4.1
4.2
4.3
4.4
H²PAK-2 package information ......................................................... 11
TO-220 type A package information................................................ 14
TO-247 package information ........................................................... 16
TO-247 long leads package information ......................................... 18
5
Revision history ............................................................................ 20
2/21
DocID022133 Rev 4
STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
Electrical ratings
1
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM
(1)
Parameter
Gate-source voltage
Drain current at T
C
= 25 °C
Drain current at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Max current during repetitive or single
pulse avalanche
Single pulse avalanche energy
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Operating junction temperature
Storage temperature
Value
± 30
12
7.6
48
250
4
215
4.5
50
- 55 to 150
Unit
V
A
A
A
W
A
mJ
V/ns
V/ns
°C
P
TOT
I
AR
E
AS
(2)
(3)
(4)
(5)
dv/dt
dv/dt
T
j
T
stg
Notes:
(1)
(2)
(3)
(4)
(5)
Pulse width limited by safe operating area.
Pulse width limited by T
Jmax.
Starting T
J
= 25 °C, I
D
=I
AS
, V
DD
= 50 V
I
SD
≤ 12 A, di/dt ≤ 100 A/µs, V
Peak
≤ V
(BR)DSS
V
DS
≤ 960 V
Table 3: Thermal data
Value
Symbol
Parameter
H PAK-2
R
thj-case
Thermal resistance junction-case max
R
thj-amb
R
thj-pcb
Thermal resistance junction-amb max
Thermal resistance junction-pcb max
30
62.5
2
TO-220
TO-247
TO-247 long leads
Unit
0.5
50
°C/W
°C/W
°C/W
DocID022133 Rev 4
3/21
Electrical characteristics
STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
2
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified)
Table 4: On/off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown
voltage
Zero gate voltage drain
current
Gate body leakage current
Gate threshold voltage
Static drain-source on-
resistance
Test conditions
V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 1200 V
V
GS
= 0, V
DS
= 1200 V,
Tc = 125 °C
V
DS
= 0 V, V
GS
= ± 20 V
V
DS
= V
GS
, I
D
= 100 µA
V
GS
= 10 V, I
D
= 6 A
3
4
0.62
Min.
1200
1
50
±10
5
0.69
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Table 5: Dynamic
Symbol
C
iss
C
oss
C
rss
C
o(tr)
C
o(er)
R
G
Q
g
Q
gs
Q
gd
Notes:
(1)
(1)
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent capacitance,
time-related
Equivalent capacitance,
energy-related
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
Min.
-
Typ.
1370
110
0.6
128
42
3
44.2
7.3
30
Max.
-
-
-
-
-
-
-
-
-
Unit
pF
pF
pF
pF
pF
Ω
nC
nC
nC
V
GS
= 0 V, V
DS
= 100 V,
f = 1 MHz
-
-
-
V
GS
= 0, V
DS
= 0 to 960 V
-
f = 1 MHz, I
D
= 0 A
V
DD
= 960 V, I
D
= 12 A
V
GS
= 10 V
(see
Figure 18: "Gate
charge test circuit"
)
-
-
-
-
(2)
Time-related is defined as a constant equivalent capacitance giving the same charging time as C
oss
when
V
DS
increases from 0 to 80% V
DSS
(2)
Energy-related is defined as a constant equivalent capacitance giving the same stored energy as C
oss
when
V
DS
increases from 0 to 80% V
DSS
4/21
DocID022133 Rev 4
STH12N120K5-2, STP12N120K5,
STW12N120K5, STWA12N120K5
Table 6: Switching times
Symbol
t
d(on)
t
r
t
d(off)
t
f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 600 V, I
D
= 6 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 20: "Unclamped
inductive load test circuit")
Electrical characteristics
Min.
-
-
-
-
Typ.
23
11
68.5
18.5
Max.
-
-
-
-
Unit
ns
ns
ns
ns
Table 7: Source drain diode
Symbol
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Notes:
(1)
(1)
Parameter
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery
time
Reverse recovery
charge
Reverse recovery
current
Reverse recovery
time
Reverse recovery
charge
Reverse recovery
current
Test conditions
Min.
-
-
Typ.
Max.
12
48
1.5
Unit
A
A
V
ns
µC
A
ns
µC
A
I
SD
= 12 A, V
GS
= 0 V
I
SD
= 12 A, V
DD
= 60 V
di/dt = 100 A/µs,
(see
Figure 19: "Test circuit
for inductive load switching
and diode recovery times")
I
SD
= 12 A,V
DD
= 60 V
di/dt = 100 A/µs,
Tj = 150 °C
(see
Figure 19: "Test circuit
for inductive load switching
and diode recovery times")
-
-
-
-
-
-
-
630
12.6
40
892
15.6
35
Pulsed: pulse duration = 300µs, duty cycle 1.5%
Table 8: Gate-source Zener diode
Symbol
V
(BR)GSO
Parameter
Gate-source
breakdown voltage
Test conditions
I
GS
= ±1 mA, I
D
= 0 A
Min
30
Typ.
-
Max.
Unit
V
The built-in back-to-back Zener diodes have been specifically designed to enhance the
ESD capability of the device. The Zener voltage is appropriate for efficient and cost-
effective intervention to protect the device integrity. These integrated Zener diodes thus
eliminate the need for external components.
DocID022133 Rev 4
5/21
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