PSD835G3V-C-20JI datasheet, PDF

Datasheet> All Categories > semiconductor> The embedded processor and controller> PSD835G3V-C-20JI

PSD835G3V-C-20JI: Description512K X 8 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80; Categorysemiconductor The embedded processor and controller; File Size747KB，120 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

Download Datasheet Parametric View All

PSD835G3V-C-20JI Overview

512K X 8 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80

PSD835G3V-C-20JI Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	80
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	3 V
Rated supply voltage	3.3 V
Number of input and output buses	52
Processing package description	PLASTIC, TQFP-80
state	DISCONTINUED
packaging shape	SQUARE
Package Size	FLATPACK, THIN PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
Microprocessor type	PIA-GENERAL PURPOSE
Number of ports	7

Preview

Download Datasheet

View All

PSD835G2

Flash PSD, 5 V supply, for 8-bit MCUs

4 Mbit + 256 Kbit dual Flash memories and 64 Kbit SRAM

Features

■

Flash in-system programmable (ISP)

peripheral for 8-bit MCUs

Dual bank flash memories

– 4 Mbits of primary Flash memory

(8 uniform sectors, 64 Kbytes)

– 256 Kbits of secondary Flash memory with

4 sectors

– Concurrent operation: READ from one

memory while erasing and writing the other

64 Kbit of SRAM

52 reconfigurable I/O ports

Enhanced JTAG serial port

PLD with macrocells

– Over 3000 gates of PLD: CPLD and DPLD

– CPLD with 16 output macrocells (OMCs)

and 24 Rev 5 macrocells (IMCs)

– DPLD - user defined internal chip select

decoding

52 individually configurable I/O port pins

They can be used for the following functions:

– MCU I/Os

– PLD I/Os

– Latched MCU address output

– Special function I/Os.

– I/O ports may be configured as open-drain

outputs.

■

Page register

– Internal page register that can be used to

expand the microcontroller address space

by a factor of 256

Programmable power management

High endurance

– 100,000 Erase/WRITE cycles of Flash

memory

– 1,000 Erase/Write cycles of PLD

– 15 year data retention

5 V±10% single supply voltage

Standby current as low as 50 µA

LQFP80 (U)

■

In-system programming (ISP) with JTAG

– Built-in JTAG compliant serial port allows

full-chip in-system programmability

– Efficient manufacturing allow easy product

testing and programming

– Use low cost FlashLINK cable with PC

Memory speed

– 70 ns Flash memory and SRAM access

time for V

= 4.5 to 5.5 V

– 90 ns Flash memory and SRAM access

time for V

= 4.5 to 5.5 V

ECOPACK

package

■

February 2009

Rev 5

1/120

www.st.com

Contents

PSD835G2

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.1

In-System Programming (ISP) via JTAG . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.1.1

1.1.2

1.1.3

First time programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Inventory build-up of preprogrammed devices . . . . . . . . . . . . . . . . . . . . 11

Expensive sockets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

1.2

In-application programming (IAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.2.1

1.2.2

1.2.3

Simultaneous READ and WRITE to Flash memory . . . . . . . . . . . . . . . . 12

Complex memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Separate program and data space . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.3

PSDsoft™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

PSD architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Page register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

PLDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

MCU bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

JTAG port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

In-system programming (ISP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

In-application reprogramming (IAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.9

Power management unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Development system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

PSD register description and address offset . . . . . . . . . . . . . . . . . . . . 24

Detailed operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.1

6.2

6.3

6.4

Memory blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Primary Flash memory and secondary Flash memory description . . . . . 33

Memory Block Select signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Upper and lower block in main Flash sector . . . . . . . . . . . . . . . . . . . . . . . 33

2/120

PSD835G2

Contents

6.5

6.6

Ready/Busy (PE4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Memory operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

7.1

7.2

7.3

7.4

7.5

7.6

7.7

7.8

7.9

7.10

Power-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Read Memory Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Read Primary Flash Identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Read Memory Sector Protection Status . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Read the Erase/Program Status bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Data Polling flag (DQ7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Toggle flag (DQ6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Error flag (DQ5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Erase Time-out flag (DQ3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Programming Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.1

8.2

8.3

Data Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Data Toggle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Unlock Bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Erasing Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

9.1

9.2

9.3

9.4

Flash Bulk Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Flash Sector Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Suspend Sector Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Resume Sector Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Specific features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

10.1

10.2

10.3

Flash Memory Sector Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Reset Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Reset (RESET) signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Sector Select and SRAM Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

12.1

Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

3/120

Contents

PSD835G2

12.2

12.3

Memory Select configuration for MCUs with separate program and data

spaces 48

Configuration modes for MCUs with separate program and data spaces 49

12.3.1

12.3.2

Separate space modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Combined space modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Page register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Memory ID registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

PLDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

15.1

15.2

15.3

15.4

15.5

15.6

15.7

15.8

15.9

PSD Turbo bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Decode PLD (DPLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Complex PLD (CPLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Output macrocell (OMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Product term allocator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Loading and Reading the output macrocells (OMC) . . . . . . . . . . . . . . . . 60

The OMC Mask register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

The Output Enable of the OMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Input macrocells (IMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

15.10 External chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

MCU bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

16.1

16.2

PSD interface to a multiplexed 8-bit bus . . . . . . . . . . . . . . . . . . . . . . . . . . 67

PSD interface to a non-multiplexed 8-bit bus . . . . . . . . . . . . . . . . . . . . . . 67

MCU bus interface examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

80C31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

16.3

16.4

16.5

16.6

16.7

80C251 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

80C51XA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

68HC11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

17.1

17.2

17.3

General port architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Port operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

MCU I/O mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

4/120

PSD835G2

Contents

17.4

17.5

17.6

17.7

17.8

17.9

PLD I/O mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Address Out mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Address In mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Data port mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Peripheral I/O mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

JTAG in-system programming (ISP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

17.10 Port configuration registers (PCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

17.11 Control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

17.12 Direction register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

17.13 Drive Select register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

17.14 Port Data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

17.15 Data In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

17.16 Data Out register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

17.17 Output macrocells (OMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

17.18 OMC Mask register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

17.19 Input macrocells (IMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

17.20 Enable Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

17.21 Ports A,B and C – functionality and structure . . . . . . . . . . . . . . . . . . . . . 83

17.22 Port D – functionality and structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

17.23 Port E – functionality and structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

17.24 Port F – functionality and structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

17.25 Port G – functionality and structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Automatic Power-down (APD) unit and Power-down mode . . . . . . . . . . . 89

18.1.1

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

18.1

18.2

18.3

18.4

18.5

18.6

Other power saving options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

PLD Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

PSD Chip Select Input (CSI, PD2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Input clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Input control signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

Reset timing and device status at Reset . . . . . . . . . . . . . . . . . . . . . . . . 93

19.1

Power-Up Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

5/120

Recommended Resources

Phase locked loop integrated circuit timer

Basic application circuit of AD590d

Tubular xenon lamp and wiring ab

Haier M0-2270M1/M0-2270M2 microwave oven circuit diagram

Circuit to improve linearity of opto-isolator

Computer motherboard circuit diagram 440BX_27

DSP28335 R&D Notes: [p=26, null, left][color=#333333][font=Arial][b]1. How to view the source files included in CCS5.2? And their locations? [/b][/font][/color][/p][p=26, null, left][color=#333333][font=Arial]The C langu...; cherish Microcontroller MCU

Application of stepping instructions: [i=s] This post was last edited by alenc007 on 2018-5-21 08:00 [/i] [size=4] 1. Omron SNXT, STEP combination and [/size][size=4] Mitsubishi SET, STL, RET combination. [/size] [size=4] [/size] [size=4]...; alenc007 Industrial Control Electronics

【2017 New Year Edition】Old Technician System Download (Win 7+Win 10): [i=s] This post was last edited by yyy138 on 2017-3-11 15:06 [/i] [2017 New Year Edition] Old Technician System Download (Win 7+Win 10)Download address:...; yyy138 Talking

PB5.0, compilation error: error C2220: warning treated as error - no object file generated: 0:0000000039:ERRORE] E:\WINCE500\PLATFORM\855gme\Src\Kernel\Libs\Kitl\kitldrv.c(33) : error C2220: warning treated as error - no object file generated[/color] BUILD: [01:0000000040:WARNN ] E:\WINCE500...; hongliang Embedded System

About the internal bus structure of C55x CPU: [size=5]The C55x CPU contains 12 internal independent buses, namely: [/size] [size=5] Program address bus (PAB): 1 group, 24 bits. [/size] [size=5] Program data bus (PB): 1 group, 32 bits. [/size] [si...; fish001 DSP and ARM Processors

What is the normal range of DNS resolution rate? Is it bad if it is too high or too low?: I asked this question because I need to monitor the DNS resolution rate and set its upper and lower limits. So I would like to ask experienced brothers to give me some experience values for the upper ...; wsmgyp Embedded System

Development of Multi-core Cable Tester

1 Introduction A wide variety of communication cables and control cables are widely used in various instruments and control equipment. Whether the cable is well-conducted and whether th...[Details]
A temperature tester based on FM20L08

1 Introduction The high temperature tester is mainly used for temperature tracking measurement and data acquisition during the heating process. By systematically analyzing the test data, the...[Details]
Autonomous driving technology will revolutionize car usage

Google's driverless technology is not only an eye-catching technology, but also a subversion of the car usage model. Those who have watched anti-terrorism films and TV dramas must have been im...[Details]
Software Simulator PICSIM Debugging and Development

We know that microcontroller development tools generally include real-time online emulators and programmers. Among them, online emulators are very good tools, but they are also more expensive...[Details]
Aromatic gas permeability test method

Aromatic gases are widely present in food, medicine, cosmetics and various daily chemical products, such as snacks, liquor, spices, Chinese herbal medicines, plasters, perfumes, soaps, shampoos, et...[Details]
CAN-bus Application Solution

Overview As a remote network communication control method with advanced technology, high reliability, complete functions and reasonable cost, CAN-bus has been widely used in various automa...[Details]
Industry Research: $50 smartphone to be launched by the end of the year

MediaTek (2454) announced the acquisition of F-MStar (3697) and attracted the attention of IC design industry. This morning, Gartner Semiconductor Industry Research Director Hong Cenwei analyzed ...[Details]
Design of 16-channel synchronous data acquisition circuit for acoustic emission based on DSP

Abstract: Aiming at the needs of coal-rock acoustic emission signal monitoring system, a data acquisition circuit with 24-bit resolution and 16-channel synchronous data acquisition function is desi...[Details]
Composition and precautions of solar LED lighting system

Today, with energy becoming increasingly scarce, the utilization of natural energy has become the focus of people's attention. Among various natural energies, the endless solar energy is highly fav...[Details]
Application of T46R14 in cold cathode fluorescent lamp converter

Liquid crystal display (LCD) panels have a wide range of applications, from small portable electronic devices to large fixed devices, including digital cameras, laptops, personal data assistants, d...[Details]
Programming of Single Chip Microcomputer Clock Circuit

Introduction X1226 has the functions of clock and calendar. The clock relies on hour, minute and second registers to track, and the calendar relies on date, week, month and year registers to tr...[Details]
Automatic test system for temperature compensated crystal oscillator compensation voltage

Temperature compensated quartz crystal oscillator (TCXO) is widely used as a high-precision frequency source in communication systems, radar navigation systems, precision measurement and control sy...[Details]
Inspiration from the personalized design of portable products in the era of Datong

When the so-called "copycat phones" that flood the domestic mobile phone market move towards large screens, stereo amplifiers, touch controls, and even GPS navigation and mobile TV, the homogeneity...[Details]
LED product quality analysis and judgment standards

In order to develop lighting LED technology, developed countries attach great importance to the research of LED testing methods and standards. For example, the National Institute of Standards and T...[Details]
What is load regulation and power regulation

1 Load Regulation Changes in power supply load will cause changes in power supply output. When the load increases, the output decreases, and vice versa, when the load decreases, the output inc...[Details]

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components