b. Maximum under steady state conditions is 80 °C/W.
Document Number: 68631
S13-1371-Rev. C, 24-Jun-13
For technical questions, contact:
pmostechsupport@vishay.com
www.vishay.com
1
a, b
t
10
s
Steady State
Symbol
R
thJA
R
thJF
Typical
33
17
Maximum
40
21
Unit
°C/W
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si4455DY
Vishay Siliconix
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
V
GS(th)
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State Resistance
a
Forward Transconductance
a
Dynamic
b
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off DelayTime
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off DelayTime
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
a
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
I
S
I
SM
V
SD
t
rr
Q
rr
t
a
t
b
I
F
= - 4 A, dI/dt = 100 A/µs, T
J
= 25 °C
I
S
= - 3 A
- 0.8
65
180
45
20
T
C
= 25 °C
- 13
- 15
- 1.2
90
270
A
V
ns
nC
ns
V
DS
V
DS
/T
J
V
GS(th)
/T
J
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
V
DD
= - 75 V, R
L
= 25
I
D
- 3 A, V
GEN
= - 10 V, R
g
= 1
V
DD
= - 75 V, R
L
= 25
I
D
- 3 A, V
GEN
= - 6 V, R
g
= 1
f = 1 MHz
V
DS
= - 75 V, V
GS
= - 10 V, I
D
= - 3 A
V
DS
= - 75 V, V
GS
= - 6 V, I
D
= - 3 A
V
DS
= - 50 V, V
GS
= 0 V, f = 1 MHz
V
GS
= 0 V, I
D
= - 250 µA
I
D
= - 250 µA
V
DS
= V
GS
, I
D
= - 250 µA
V
DS
= 0 V, V
GS
= ± 20 V
V
DS
= - 150 V, V
GS
= 0 V
V
DS
= - 150 V, V
GS
= 0 V, T
J
= 55 °C
V
DS
- 5 V, V
GS
= - 10 V
V
GS
= - 10 V, I
D
= - 4 A
V
GS
= - 6 V, I
D
= - 3 A
V
DS
= - 15 V, I
D
= 4 A
-8
0.245
0.260
12
1190
61
42
27.5
23.2
5.4
8.4
6.1
20
95
38
34
11
28
52
35
9.2
30
145
60
51
18
42
78
53
ns
42
35
nC
pF
0.295
0.315
-2
- 150
- 165
- 6.6
-4
± 100
-1
- 10
V
mV/°C
V
nA
µA
A
S
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Notes:
a. Pulse test; pulse width
300 µs, duty cycle
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
For technical questions, contact:
pmostechsupport@vishay.com
Document Number: 68631
S13-1371-Rev. C, 24-Jun-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si4455DY
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
20
V
GS
= 10
V
thru 6
V
16
I
D
- Drain Current (A)
I
D
- Drain Current (A)
V
GS
= 5
V
1.6
2.0
12
1.2
8
0.8
T
C
= 125 °C
0.4
4
V
GS
= 4
V
0
0
2
4
6
8
10
V
DS
- Drain-to-Source
Voltage
(V)
T
C
= 25
T
C
= - 55 °C
0.0
0
1
2
3
4
5
6
V
GS
- Gate-to-Source
Voltage
(V)
Output Characteristics
0.6
1700
Transfer Characteristics
R
DS(on)
- On-Resistance (Ω)
0.5
1360
C
iss
0.4
V
GS
= 6
V
0.3
V
GS
= 10
V
C - Capacitance (pF)
1020
680
0.2
340
C
oss
0.1
0
4
8
12
16
20
0
0
C
rss
20
40
60
80
100
I
D
- DrainCurrent (A)
V
DS
- Drain-to-Source
Voltage
(V)
On-Resistance vs. Drain Current and Gate Voltage
10
Capacitance
2.2
R
DS(on)
- On-Resistance (Normalized)
I
D
= 3 A
V
GS
- Gate-to-Source
Voltage
(V)
V
DS
= 50
V
I
D
= 4 A
1.9
V
GS
= 10
V
8
V
DS
= 75
V
6
V
DS
= 100
V
4
1.6
1.3
V
GS
= 6
V
1.0
2
0.7
0
0
6
12
18
24
30
0.4
- 50
- 25
0
25
50
75
100
125
150
Q
g
- TotalGateCharge(nC)
T
J
- Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
Document Number: 68631
S13-1371-Rev. C, 24-Jun-13
For technical questions, contact:
pmostechsupport@vishay.com
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si4455DY
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
100
2.0
10
R
DS(on)
- On-Resistance (Ω)
1.6
I
S
- Source Current (A)
1.2
T
J
= 150 °C
1
T
J
= 25 °C
0.8
T
J
= 125 °C
0.4
T
J
= 25 °C
0.1
0.0
0.3
0.6
0.9
1.2
1.5
0.0
0
2
4
6
8
10
V
SD
- Source-to-Drain
Voltage
(V)
V
GS
- Gate-to-SourceVoltage (V)
Source-Drain Diode Forward Voltage
1.0
On-Resistance vs. Gate-to-Source Voltage
200
0.7
V
GS(th)
Variance
(V)
I
D
= 250
µA
0.4
I
D
= 5 mA
0.1
Power (W)
160
120
80
- 0.2
40
- 0.5
- 50
0
- 25
0
25
50
75
100
125
150
0 .0 0 1
0.01
0.1
Time (s)
1
10
T
J
- Temperature (°C)
Threshold Voltage
100
Single Pulse Power, Junction-to-Ambient
I
D
- Drain Current (A)
10
Limited
by
R
DS(on)
*
1 ms
1
10 ms
100 ms
0.1
T
A
= 25 °C
Single Pulse
0.01
0.01
0.1
1
10
100
1s
10 s
DC
1000
V
DS
- Drain-to-Source
Voltage
(V)
*
V
GS
> minimum
V
GS
at
which
R
DS(on)
is specified
Safe Operating Area, Junction-to-Ambient
www.vishay.com
4
For technical questions, contact:
pmostechsupport@vishay.com
Document Number: 68631
S13-1371-Rev. C, 24-Jun-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si4455DY
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
4
3
I
D
- DrainCurrent (A)
2
1
0
0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
Current Derating*
8.0
2.0
6.4
1.6
Power (W)
4.8
Power (W)
1.2
3.2
0.8
1.6
0.4
0.0
0
25
50
75
100
125
150
0.0
0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
T
A
- Ambient Temperature (°C)
Power, Junction-to-Foot
Power, Junction-to-Ambient
* The power dissipation P
D
is based on T
J(max.)
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 68631
S13-1371-Rev. C, 24-Jun-13
For technical questions, contact:
pmostechsupport@vishay.com
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
How to make your brain react faster and more efficiently. You can read the following suggestions and apply them to yourself. 1. Drink plenty of water. Your brain needs adequate water to function effe...
Hardware designers have begun to adopt FPGA technology in high-performance DSP designs because it can provide 10-100 times faster computing than PC-based or microcontroller-based solutions. Previou...[Details]
This paper designs a dot matrix LED text display screen that is easy to update, expandable, and low-cost. The way to reduce costs is
① Use the Bluetooth data transmission function of mobile ph...[Details]
Images in science fiction movies often break through the limits of reality, such as in the movie "Minority Report." Tom Cruise uses a multi-touch screen to browse information. Capacitive sensing te...[Details]
We know that microcontroller development tools generally include real-time online emulators and programmers. Among them, online emulators are very good tools, but they are also more expensive...[Details]
Editor's note: In order to help technicians or engineers who have knowledge of PIC microcontroller assembly language quickly master the method of using C language to program PIC microcontrollers, t...[Details]
Xiaomi, a well-known Internet phone in mainland China, won a million-unit order contract from China Unicom on November 20 last year, which made Xiaomi famous in mainland China. In April this year...[Details]
PV inverter manufacturer SMA has launched its first DC arc fault circuit interrupter (AFCI) PV inverter and has received UL certification.
The new SunnyBoy AFCI inverter models include 3000-US...[Details]
Spatial Division Multiplexing (SDM) MIMO processing can significantly improve spectrum efficiency and thus greatly increase the capacity of wireless communication systems. Spatial Division Multip...[Details]
LED light sources have many environmental advantages, but early products still have certain technical bottlenecks in heat dissipation and high brightness design that cannot be broken through....[Details]
1. Overview
At present, an information revolution is in the ascendant around the world, led by microelectronics, computers and communication technologies, and centered on information technolog...[Details]
1 Introduction
With the improvement of people's quality of life, lamps are no longer just basic indoor lighting tools, but also a kind of practical art for architectural decoration. When ther...[Details]
Overview
By transmitting ultrasonic energy into the human body and receiving and processing the returning reflected signals, phased array ultrasound systems can generate images of organs and s...[Details]
1 Load Regulation
Changes in power supply load will cause changes in power supply output. When the load increases, the output decreases, and vice versa, when the load decreases, the output inc...[Details]
Synchronous buck designs are becoming increasingly difficult, and the selection of suitable ICs is becoming quite narrow. This Design Idea combines a current-mode PWM IC used in a flyback regulator...[Details]
In recent years, the application of single-chip microcomputer systems in the field of industrial measurement and control has become more and more extensive. However, for industrial sites with harsh...[Details]