EEWORLDEEWORLDEEWORLD

Part Number

Search

8LT0-21F16PBML

Description
MIL Series Connector,
CategoryThe connector   
File Size81KB,1 Pages
ManufacturerSOURIAU
Download Datasheet Parametric View All

8LT0-21F16PBML Overview

MIL Series Connector,

8LT0-21F16PBML Parametric

Parameter NameAttribute value
MakerSOURIAU
Reach Compliance Codeunknown
Is SamacsysN
Connector typeMIL SERIES CONNECTOR
Base Number Matches1
8LT Series
Dimensions
MIL-DTL-38999 Series I
Type 0 - Square flange receptacle
A
B
4 holes ØG
See Detail p.22
E
Panel cut out
ØC
Ø
F
D
Shell
size
09
1
1
1
3
15
1
7
1
9
21
23
25
A
Min
Max
Max. panel
thickness: 2.50
B
Min
Max
ØC
Min
1
4.40
1
7.65
21.40
24.65
1
3.49 27.82
29.24
33.70
36.92
40.06
Max
1
4.53
1
7.78
21.59
24.77
27.94
30.66
33.83
37.00
40.18
Min
D
Max
Min
23.70
26.05
28.50
30.85
33.20
36.40
39.55
42.75
46.00
E
Max
24.30
26.70
29.05
31.45
33.80
37.00
40.1
5
43.35
46.50
F
18.26
20.62
23.01
24.61
26.97
29.36
31.75
34.93
38.10
J
ØG
Min
Max
J
4 holes ØK
ØH
Min
1
5.70
18.70
21.80
25.00
28.30
31.00
34.20
37.30
40.50
H
J
18.26
20.62
23.01
24.61
26.97
29.36
31.75
34.92
38.10
K
±0.15
1
5.93 16.05
1
3.23
2.1
4
2.54
3.25
3.35
3.25
1 7
5.1
1
5.29
2.90
3.30
3.73
3.83
3.91
Type 1 - Cable connecting receptacle
A
B
E
See Detail p.22
ØC
ØF
D
Shell
size
9
1
1
1
3
15
1
7
1
9
21
23
25
Note: All dimensions are in millimeters (mm)
A
Min
Max
Min
B
Max
Min
1
4.40
1
7.65
21.40
24.65
1
3.23
1
3.49
27.82
29.24
33.70
ØC
Max
1
4.53
1
7.78
21.59
24.77
27.94
30.66
33.83
37.00
40.18
2.90
2.1
4
Min
D
Max
Min
18.35
21.65
2.54
25.05
27.25
30.78
34.05
37.45
3.30
41.45
45.93
E
Max
18.92
22.22
25.62
27.82
31.35
34.62
38.02
42.02
46.50
Min
21.80
25.10
28.50
30.70
34.10
37.50
40.90
44.90
49.40
ØF
Max
22.35
25.65
29.05
31.25
34.65
38.05
41.45
45.45
49.95
1
5.93
16.05
1 7
5.1
1
5.29
36.92
40.06
© 201 - SOURIAU
3
19
[EEWORLD takes you DIY] Oscilloscope V2.0 indicators are tentative~~~
Preliminary indicators have been determined. Sampling rate: single-channel 250M, dual-channel 125M (8bit) Bandwidth (1db): >50M (note, not 3db bandwidth, 3db deviation is too large) Input impedance: 1...
soso DIY/Open Source Hardware
About DDS IP core output frequency range
I would like to ask you, in Xilinx's DDS IP core, if there is no DAC for digital-to-analog conversion, will the frequency of the DDS output have multiple Nyquist zone images like DAC or ADC?...
eeleader FPGA/CPLD
Every time I come to this section, I feel chilled! ~
I feel disappointed every time I come to this forum! ~This forum should be very popular, why are there so few netizens visiting! ~I really don't understand! ~...
wanghongyang Buy&Sell
Self-use real6410 development board
real6410 development board The official standard configuration is 1,380 yuan, and you can check the Huatianzheng official website for details. Self-use development board, 90% new, price 800 yuan, inte...
yunting Buy&Sell
Why does a NAND block need to be discarded if one page is damaged?
Reposted from [url]http://blog.sina.com.cn/s/blog_679f935601013zjx.html[/url]The above picture shows the internal structure of NAND. WL is a number of pages, and a group of (64) WLs is a block. From t...
白丁 FPGA/CPLD
It's not easy to sit in front of the computer all day, here are some wallpapers for you to enjoy
Some of them are pure landscapes, not suitable for wallpapers, please take a look....
huchuan987 Talking

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 305  1979  294  2539  204  7  40  6  52  5 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号