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74LS51DCQM

Description
AND-OR-Invert Gate, TTL, CDIP14,
Categorylogic   
File Size229KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

74LS51DCQM Overview

AND-OR-Invert Gate, TTL, CDIP14,

74LS51DCQM Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerFairchild
Reach Compliance Codecompliant
Is SamacsysN
JESD-30 codeR-XDIP-T14
JESD-609 codee0
Logic integrated circuit typeAND-OR-INVERT GATE
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Schmitt triggerNO
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
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