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MT4LSDT464AG-133XX

Description
Synchronous DRAM Module, 4MX64, 5.4ns, CMOS, DIMM-168
Categorystorage    storage   
File Size493KB,28 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Download Datasheet Parametric View All

MT4LSDT464AG-133XX Overview

Synchronous DRAM Module, 4MX64, 5.4ns, CMOS, DIMM-168

MT4LSDT464AG-133XX Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicron Technology
Parts packaging codeDIMM
package instructionDIMM,
Contacts168
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
access modeFOUR BANK PAGE BURST
Maximum access time5.4 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N168
JESD-609 codee0
memory density268435456 bit
Memory IC TypeSYNCHRONOUS DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals168
word count4194304 words
character code4000000
Operating modeSYNCHRONOUS
Maximum operating temperature65 °C
Minimum operating temperature
organize4MX64
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)235
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperature30
Base Number Matches1
32MB, 64MB, 128MB (x64, SR) 168-Pin SDRAM UDIMM
Features
SDRAM Unbuffered DIMM (UDIMM)
MT4LSDT464A – 32MB
MT4LSDT864A(I) – 64MB
MT4LSDT1664A(I) – 128MB
For component data sheets, refer to Micron’s Web site:
www.micron.com
Features
168-pin, dual in-line memory module (DIMM)
PC100- and PC133-compliant
Unbuffered
32MB (4 Meg x 64)
2
, 64MB (8 Meg x 64),
128MB (16 Meg x 64)
Single +3.3V power supply
Fully synchronous; all signals registered on positive
edge of system clock
Internal pipelined operation; column address can be
changed every clock cycle
Internal SDRAM banks for hiding row access/
precharge
Programmable burst lengths: 1, 2, 4, 8, or full page
Auto precharge, includes CONCURRENT AUTO
PRECHARGE and auto refresh modes
Self refresh mode: 64ms, 4,096-cycle refresh
for 32MB and 64MB; 64ms, 8,192-cycle refresh
for 128MB
LVTTL-compatible inputs and outputs
Serial presence-detect (SPD)
Gold edge contacts
Figure 1:
168-Pin DIMM (MO-161)
Standard 25.4mm (1.0in)
Options
• Package
– 168-pin DIMM (standard)
– 168-pin DIMM (Pb-free)
• Operating temperature range
– Commercial (0°C to +65°C)
– Industrial (–40°C to +85°C)
1, 3
• Frequency/CAS Latency
– 7.5ns (133 MHz)/CL = 2
– 7.5ns (133 MHz)/CL = 3
– 8ns (100 MHz)/CL = 2
2
• PCB
– Standard 25.40mm (1.0in)
Marking
G
Y
None
I
-13E
-133
-10E
Notes: 1. Contact Micron for product availability.
2. Not recommended for new designs.
3. Industrial temperature option available in
-133 MHz only.
Table 1:
Key Timing Parameters
CL = CAS (READ) latency
Industry
Nomenclature
PC133
PC133
PC100
Access Time
CL = 2
5.4ns
9ns
CL = 3
5.4ns
7.5ns
Setup Time
-13E
-133
-10E
Hold Time
133 MHz
133 MHz
100 MHz
Speed Grade
-13E
-133
-10E
2
PDF: 09005aef8078bc7c/Source: 09005aef8078bcd3
SD4C4_8_16X64AG.fm - Rev. D 1/07 EN
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
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