MC32XSG
Multi-purpose high-side switches
Rev. 3.0 — 6 November 2018
Data sheet: advance information
1
General description
The 32XSG family is designed to control, protect and diagnose various type of low-
voltage loads with enhanced precision. It combines flexibility, extended digital and analog
feedbacks, safety, and robustness. This family offers the possibility to configure outputs
to improve EMC, manage frequency and duty cycle, adapt the dynamic overcurrent
profiles to the load, program the current sense ratio of each output, and many more.
Devices can be driven either by the embedded SPI module or by direct inputs in Fail-safe
operation mode and remains operational, controllable and protected in this case. This
product is driven by SMARTMOS technology.
2
Features and benefits
•
Penta high-side switches with high transient capability
•
16-bit 5.0 MHz SPI control of overcurrent profiles, channel control including PWM duty
cycles, output On and Off openload detections, thermal shutdown and prewarning, and
fault reporting
•
Output current monitoring with programmable synchronization signal and supply
voltage feedback
•
Fail-safe mode
•
External smart power switch control
•
Operating voltage is 7.0 V to 30 V with sleep current < 5.0 μA, extended mode from
6.0 V to 32 V
•
-16 V reverse polarity and ground disconnect protections
•
Compatible PCB foot print and SPI software driver among the family
NXP Semiconductors
Multi-purpose high-side switches
MC32XSG
3
Simplified application diagram
Figure 1. Simplified application diagram
4
Applications
•
•
•
•
•
•
•
•
Low-voltage exterior lighting
Low-voltage industrial lighting
Low-voltage automation systems
Halogen lamps
Incandescent bulbs
Light-emitting diodes (LEDs)
HID Xenon ballasts
DC Motors
5
Ordering information
This section describes the part numbers available to be purchased along with their
differences.
Table 1. Orderable parts
Part number
MC07XSG517EK
MC17XSG500EK
MC17XSG500BEK
[1]
Notes
Temperature (T
A
) Package
SOIC54 pins
exposed pad
–40 °C to 125 °C
SOIC32 pins
exposed pad
SOIC32 pins
exposed pad
OUT1 R
DS(on)
OUT2
R
DS(on)
17 mΩ
17 mΩ
17 mΩ
17 mΩ
17 mΩ
17 mΩ
OUT3
R
DS(on)
7.0 mΩ
17 mΩ
17 mΩ
OUT4
R
DS(on)
7.0 mΩ
17 mΩ
17 mΩ
OUT5
R
DS(on)
7.0 mΩ
17 mΩ
17 mΩ
OUT6
Yes
Yes
Yes
[1]
To order parts in tape and reel, add the R2 suffix to the part number.
Valid orderable part numbers are provided on the web. To determine the orderable part
numbers for this device, go to
nxp.com
and perform a part number search.
MC32XSG
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: advance information
Rev. 3.0 — 6 November 2018
2 / 63
NXP Semiconductors
Multi-purpose high-side switches
MC32XSG
6
Internal block diagram
Figure 2. 32XSG simplified internal block diagram
MC32XSG
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: advance information
Rev. 3.0 — 6 November 2018
3 / 63
NXP Semiconductors
Multi-purpose high-side switches
MC32XSG
7
Pinning information
7.1 Pinning
Figure 3. Pin configuration for 32-pin SOIC-EP package
MC32XSG
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: advance information
Rev. 3.0 — 6 November 2018
4 / 63
NXP Semiconductors
Multi-purpose high-side switches
MC32XSG
Figure 4. Pin configuration for 54-pin SOIC-EP package
7.2 Pin description
Table 2. Pin description
Symbol
CP
Pin
32 SOIC-EP
1
Pin
[1]
54 SOIC-EP
3
Pin function
Internal supply
Formal name
Charge pump
Definition
This pin is the connection for an
external capacitor for charge pump
use only.
This input pin is used to initialize
the device configuration and fault
registers, as well as place the device
in a low-current Sleep mode. This pin
has a passive internal pull-down.
This input pin is connected to a
chip select output of a master
microcontroller (MCU). When this
digital signal is high, SPI signals are
ignored. Asserting this pin low starts
an SPI transaction. The transaction
is indicated as completed when this
signal returns to high level. This pin
has a passive internal pull-up to VCC
through a diode
This input pin is connected to the
MCU providing the required bit shift
clock for SPI communication. This pin
has a passive internal pull-down.
© NXP B.V. 2018. All rights reserved.
RSTB
2
4
SPI
Reset
CSB
3
5
SPI
Chip select
SCLK
4
6
SPI
Serial clock
MC32XSG
All information provided in this document is subject to legal disclaimers.
Data sheet: advance information
Rev. 3.0 — 6 November 2018
5 / 63
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