P4C422-35DMB datasheet, PDF - EEWORLD Datasheet

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P4C422-35DMB: DescriptionHIGH SPEED 256 x 4 STATIC CMOS RAM; Categorystorage storage; File Size208KB，10 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C422-35DMB Overview

HIGH SPEED 256 x 4 STATIC CMOS RAM

P4C422-35DMB Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP,
Contacts	22
Reach Compliance Code	compli
ECCN code	3A001.A.2.C
Maximum access time	35 ns
JESD-30 code	R-CDIP-T22
JESD-609 code	e0
length	27.2542 mm
memory density	1024 bi
Memory IC Type	STANDARD SRAM
memory width	4
Number of functions	1
Number of terminals	22
word count	256 words
character code	256
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	256X4
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum seat height	5.715 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm
Base Number Matches	1

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P4C422

HIGH SPEED 256 x 4

STATIC CMOS RAM

FEATURES

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25/35 ns (Commercial)

– 15/20/25/35 ns (Military)

CMOS for Low Power

– 495 mW Max. – 10/12/15/20/25 (Commercial)

– 495 mW Max. – 15/20/25/35 (Military)

Single 5V±10% Power Supply

Separate I/O

Fully TTL Compatible Inputs and Outputs

Resistant to single event upset and latchup

resulting from advanced process and design

improvements

Standard 22-pin 400 mil DIP, 24-pin 300 mil

SOIC, 24-pin square LCC package and 24-pin

CERPACK package

DESCRIPTION

The P4C422 is a 1,024-bit high-speed (10ns) Static

RAM with a 256 x 4 organization. The memory requires

no clocks or refreshing and has equal access and cycle

times. Inputs and outputs are fully TTL compatible.

Operation is from a single 5 Volt supply. Easy memory

expansion is provided by an active LOW chip select one

(CS

) and active HIGH chip select two (CS

) as well as

3-state outputs.

In addition to high performance and high density, the

device features latch-up protection, single event and

upset protection. The P4C422 is offered in several

packages: 22-pin 400 mil DIP (plastic and ceramic), 24-

pin 300 mil SOIC, 24-pin square LCC and 24-pin

CERPACK. Devices are offered in both commercial and

military temperature ranges.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

SOIC (S4)

CERPACK (F3) SIMILAR

DIP (P3-1, C3-1, D3-1)

LCC (L4)

Document #

SRAM101

REV. A

Revised October 2005

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