5962-00-477-9460 datasheet, PDF

5962-00-477-9460: DescriptionAND-OR-Invert Gate, TTL, CDIP14,; Categorylogic logic; File Size66KB，1 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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5962-00-477-9460 Overview

AND-OR-Invert Gate, TTL, CDIP14,

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Fairchild
package instruction	DIP, DIP14,.3
Reach Compliance Code	compliant
Is Samacsys	N
JESD-30 code	R-XDIP-T14
Logic integrated circuit type	AND-OR-INVERT GATE
MaximumI(ol)	0.016 A
Humidity sensitivity level	2A
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	250
power supply	5 V
Maximum supply current (ICC)	14 mA
Prop。Delay @ Nom-Sup	22 ns
Certification status	Not Qualified
Schmitt trigger	NO
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Base Number Matches	1

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