®
RT9148/9
20V, 350mA, Rail-to-Rail Operational Amplifier
General Description
The RT9148/9 consists of a low power, high slew rate,
single supply rail-to-rail input and output operational
amplifier. The RT9148 contains a single amplifier and
RT9149 contains two amplifiers in one package.
The RT9148/9 has a high slew rate (35V/μs), 350mA peak
output current and offset voltage below 15mV. The
RT9148/9 is ideal for Thin Film Transistor Liquid Crystal
Displays (TFT-LCD).
The RT9148 is available in the WDFN-6L 2x2, TSOT-23-5
and UDFN-6L 2x2 packages. The RT9149 is available in
the WDFN-8L 3x3 package. The RT9148/9 are specified
for operation over the full temperature range from
−40°C
to
85°C.
Features
Rail-to-Rail Output Swing
Supply Voltage : 6V to 20V
Peak Output Current : 350mA
High Slew Rate : 35V/μs
μ
Unity Gain Stable
RoHS Compliant and Halogen Free
Applications
TFT LCD Panels
Notebook Computers
Monitors
LCD TVs
Ordering Information
RT9148
Package Type
QW : WDFN-6L 2x2 (W-Type)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
RT9148
Marking Information
RT9148ZQW
0E : Product Code
0EW
W : Date Code
RT9148GJ5
00 : Product Code
00=DNN
DNN : Date Code
Package Type
J5 : TSOT-23-5
QU : UDFN-6L 2x2 (U-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
RT9148GQU
2D : Product Code
RT9149
Package Type
QW : WDFN-8L 3x3 (W-Type)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
2DW
W : Date Code
RT9149ZQW
86 : Product Code
Note :
86 YM
DNN
YMDNN : Date Code
Richtek products are :
½
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
½
Copyright
©
2013 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS9148/9-04
October 2013
www.richtek.com
1
RT9148/9
Pin Configurations
(TOP VIEW)
VS+
VS-
VS-
NC
VS+
1
2
3
6
5
4
VIN-
VS-
4
VIN+
VIN-
VOUT
5
7
2
3
VOUTA
VINA-
VINA+
VS-
1
2
3
4
8
7
6
5
9
VS+
VOUTB
VINB-
VINB+
VOUT VS- VIN+
WDFN-6L 2x2 / UDFN-6L 2x2
RT9148
TSOT-23-5
RT9148
WDFN-8L 3x3
RT9149
Typical Application Circuit
VS+
VS+
VINx+
VINx-
+
-
VOUTx
R
S
*
TFT-LCD
Capacitance
VS-
* : R
S
may be needed for some applications.
Function Block Diagram
VS+
VIN+
VIN-
-
+
VOUT
VS-
WDFN-6L 2x2 / UDFN-6L 2x2
RT9148
VS+
VIN+
VIN-
+
-
VOUT
VS-
TSOT-23-5
RT9148
VOUTA
VINA-
VINA+
VS+
-
+
-
+
VOUTB
VINB-
VINB+
VS-
WDFN-8L 3x3
RT9149
Copyright
©
2013 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS9148/9-04
October 2013
RT9148/9
Functional Pin Description
RT9148
Pin No.
WDFN-6L 2x2,
TSOT-23-5
UDFN-6L 2x2
1,
7 (Exposed Pad)
2
3
4
5
6
RT9149
Pin No.
1
2
3
4, 9 (Exposed Pad)
5
6
7
8
Pin Name
VOUTA
VINA
VINA+
VS
VINB+
VINB
VOUTB
VS+
Output of Amplifier A.
Negative Input of Amplifier A.
Positive Input of Amplifier A.
Negative Supply Input.
Positive Input of Amplifier B.
Negative Input of Amplifier B.
Output of Amplifier B.
Positive Supply Input.
Pin Function
2
--
5
1
4
3
Pin Name
Pin Function
VS
NC
VS+
VOUT
VIN
VIN+
Negative Supply Input.
No Internal Connection.
Positive Supply Input.
Output.
Negative Input.
Positive Input.
Copyright
©
2013 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS9148/9-04
October 2013
www.richtek.com
3
RT9148/9
Absolute Maximum Ratings
(Note 1)
Supply Voltage, (VS+ to VS−) ------------------------------------------------------------------------------------------- 24V
VINx+, VINx− to VS− -------------------------------------------------------------------------------------------------------
−0.3V
to 24V
VINx+ to VINx− --------------------------------------------------------------------------------------------------------------
±5V
Power Dissipation, P
D
@ T
A
= 25°C
WDFN-6L 2x2 ---------------------------------------------------------------------------------------------------------------- 2.1W
TSOT-23-5 --------------------------------------------------------------------------------------------------------------------- 0.43W
UDFN-6L 2x2 ----------------------------------------------------------------------------------------------------------------- 2.09W
WDFN-8L 3x3 ---------------------------------------------------------------------------------------------------------------- 3.22W
Package Thermal Resistance (Note 2)
WDFN-6L 2x2,
θ
JA
----------------------------------------------------------------------------------------------------------- 47.5°C/W
TSOT-23-5,
θ
JA
--------------------------------------------------------------------------------------------------------------- 230.6°C/W
UDFN-6L 2x2,
θ
JA
------------------------------------------------------------------------------------------------------------ 47.7°C/W
WDFN-8L 3x3,
θ
JA
----------------------------------------------------------------------------------------------------------- 31°C/W
WDFN-8L 3x3,
θ
JC
----------------------------------------------------------------------------------------------------------- 8°C/W
Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------------- 260°C
Junction Temperature ------------------------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ----------------------------------------------------------------------------------------------
−65°C
to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) ------------------------------------------------------------------------------------------------ 2kV
MM (Machine Model) ------------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 4)
Supply Voltage, VS− = 0V, VS+ -----------------------------------------------------------------------------------------
6V to 20V
Junction Temperature Range ----------------------------------------------------------------------------------------------
−40°C
to 125°C
Ambient Temperature Range ----------------------------------------------------------------------------------------------
−40°C
to 85°C
Electrical Characteristics
(V
S+
= 16V, V
S
−
= 0V, V
INx+
= V
OUTx
= V
S+
/ 2, R
L
= 10kΩ and C
L
= 10pF, T
A
= 25°C, unless otherwise specified)
Parameter
Input Characteristics
Input Offset Voltage
Input Bias Current
Load Regulation
Common Mode Input
Range
Common Mode Rejection
Ratio
Open Loop Gain
Symbol
V
OS
I
B
V
LOAD
CMIR
CMRR
A
VOL
Test Conditions
V
CM
= V
S+
/ 2
V
CM
= V
S+
/ 2
I
L
= 0 to
80mA
I
L
= 0 to 80mA
Min
--
--
--
--
0.5
Typ
2
2
0.1
Max
15
50
--
--
V
S+
0.5
--
--
Unit
mV
nA
mV/mA
V
dB
dB
0.1
--
95
118
0.5V
V
OUTx
V
S+
0.5V
0.5V
V
OUTx
V
S+
0.5V
--
--
Copyright
©
2013 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS9148/9-04
October 2013
RT9148/9
Parameter
Output Characteristics
Output Swing Low
Output Swing High
Transient Peak Output
Current
Power Supply
Power Supply Rejection
Ratio
Quiescent Current
Dynamic Performance
Slew Rate
SR
4V step, 20% to 80%, A
V
= 1
A
V
= 1, V
OUTx
= 2V step
R
L
= 10k, C
L
= 10pF
R
L
= 10k, C
L
= 10pF
R
L
= 10k, C
L
= 10pF
R
L
= 10k, C
L
= 10pF
--
--
--
--
--
35
270
16
12
50
--
--
--
--
--
V/s
ns
MHz
MHz
--
V
OL
V
OH
I
PK
I
L
=
50mA
I
L
= 50mA
--
V
S+
1.5
300
0.6
V
S+
0.3
350
1.5
--
400
V
V
mA
Symbol
Test Conditions
Min
Typ
Max
Unit
PSRR
I
DD
V
S+
= 6V to 20V, V
CM
= V
OUTx
= V
S+
/ 2
No Load
--
--
96
4
--
--
dB
mA
Setting to ±0.1% (AV = 1) t
S
3dB
Bandwidth
Gain-Bandwidth Product
Phase Margin
BW
GBWP
PM
Note 1.
Stresses beyond those listed
“Absolute
Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2.
θ
JA
is measured at T
A
= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
θ
JC
is
measured at the exposed pad of the package.
Note 3.
Devices are ESD sensitive. Handling precaution is recommended.
Note 4.
The device is not guaranteed to function outside its operating conditions.
Copyright
©
2013 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS9148/9-04
October 2013
www.richtek.com
5
京公网安备 11010802033920号
EEWORLD
