NLAST4501
Single SPST Analog Switch
The NLAST4501 is an analog switch manufactured in sub−micron
silicon−gate CMOS technology. It achieves very low R
ON
while
maintaining extremely low power dissipation. The device is a bilateral
switch suitable for switching either analog or digital signals, which
may vary from zero to full supply voltage.
The NLAST4501 is a low voltage, TTL (low threshold) compatible
device, pin for pin compatible with the MAX4501.
The Enable pin is compatible with standard TTL level outputs when
supply voltage is nominal 5.0 V. It is also over−voltage tolerant,
making it a very useful logic level translator.
Features
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MARKING
DIAGRAMS
A3 M
G
G
1
1
SC70−5/SC−88A/SOT−353
DF SUFFIX
CASE 419A
•
•
•
•
•
Guaranteed R
ON
of 32
W
at 5.5 V
Low Power Dissipation: I
CC
= 2
mA
Low Threshold Enable pin TTL compatible at 5.0 V
TTL version and pin for pin with NLAS4501
Provides Voltage translation for many different voltage levels
3.3 to 5.0 V, Enable pin may go as high as
)5.5
V
1.8 to 3.3 V
1.8 to 2.5 V
•
Improved version of MAX4501 (at any voltage between 2 and 5.5 V)
1
TSOP−5
DT SUFFIX
CASE 483
1
A3AYW
G
G
•
Chip Complexity: FETs = 11
•
Pb−Free Packages are Available
A3 = Specific Device Code
M = Date Code*
A = Assembly Location
Y = Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position and underbar
may vary depending upon manufacturing location.
5
V
CC
Pin
COM
1
PIN ASSIGNMENT
Function
COM
NO
GND
ENABLE
V
CC
NO
2
1
2
GND
3
4
ENABLE
3
4
5
Figure 1. Pinout
(Top View)
FUNCTION TABLE
On/Off Enable Input
L
H
State of Analog Switch
Off
On
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
May, 2006 − Rev. 4
Publication Order Number:
NLAST4501/D
NLAST4501
MAXIMUM RATINGS
Rating
Positive DC Supply Voltage
Digital Input Voltage (Enable)
Analog Output Voltage (V
NO
or V
COM
)
DC Current, Into or Out of Any Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
Power Dissipation in Still Air at 85_C
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Above V
CC
and Below GND at 85_C (Note 5)
SC70−5/SC−88A (Note 1)
TSOP−5
SC70−5/SC−88A
TSOP−5
Symbol
V
CC
V
IN
V
IS
I
IK
T
STG
T
L
T
J
q
JA
P
D
MSL
F
R
V
ESD
Value
*0.5
to
)7.0
*0.5
to
)7.0
*0.5
to V
CC
)0.5
$20
*65
to
)150
260
)150
350
230
150
200
Level 1
UL 94 V−0 @ 0.125 in
> 2000
> 100
N/A
$300
V
Unit
V
V
V
mA
_C
_C
_C
_C/W
mW
Latchup Performance
I
Latchup
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Parameter
Positive DC Supply Voltage
Digital Input Voltage (Enable)
Static or Dynamic Voltage Across an Off Switch
Analog Input Voltage (NO, COM)
Operating Temperature Range, All Package Types
Input Rise or Fall Time,
(Enable Input)
V
cc
= 3.3 V
$
0.3 V
V
cc
= 5.0 V
$
0.5 V
NORMALIZED FAILURE RATE
Symbol
V
CC
V
IN
V
IO
V
IS
T
A
t
r
, t
f
Min
2.0
GND
GND
GND
*55
0
0
Max
5.5
5.5
V
CC
V
CC
)125
100
20
Unit
V
V
V
V
_C
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature
°C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
T
J
= 130_C
T
J
= 120_C
T
J
= 100_C
T
J
= 110_C
T
J
= 90_C
T
J
= 80_C
100
TIME, YEARS
1
1
10
1000
Figure 2. Failure Rate vs. Time Junction Temperature
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2
NLAST4501
DC CHARACTERISTICS − Digital Section
(Voltages Referenced to GND)
Guaranteed Max Limit
Parameter
Minimum High−Level Input
Voltage, Enable Inputs
Condition
Symbol
V
IH
V
CC
3.0
4.5
5.5
3.0
4.5
5.5
0 V to 5.5 V
5.5
*55_C
to 25_C
1.4
2.0
2.0
0.53
0.8
0.8
$0.1
1.0
t85_C
1.4
2.0
2.0
0.53
0.8
0.8
$1.0
1.0
t125_C
1.4
2.0
2.0
0.53
0.8
0.8
$1.0
2.0
Unit
V
Maximum Low−Level Input
Voltage, Enable Inputs
V
IL
V
Maximum Input Leakage
Current, Enable Inputs
Maximum Quiescent Supply
Current (per package)
V
IN
= 5.5 V or GND
Enable and VIS = V
CC
or GND
I
IN
I
CC
mA
mA
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Max Limit
Parameter
Maximum ON Resistance
(Figures 8 − 12)
ON Resistance Flatness
Condition
V
IN
= V
IH
V
IS
= V
CC
to GND
I
Is
I =
v10.0mA
V
IN
= V
IH
I
Is
I =
v10.0
mA
V
IS
= 1 V, 2 V, 3.5 V
V
IN
= V
IL
V
NO
= 1.0 V, V
COM
= 4.5 V or
V
COM
= 1.0 V and V
NO
4.5 V
V
IN
= V
IL
V
NO
= 4.5 V or 1.0 V
V
COM
= 1.0 V or 4.5 V
Symbol
R
ON
V
CC
3.0
4.5
5.5
4.5
*55_C
to 25_C
45
30
25
4
t85_C
50
35
30
4
t125_C
55
40
35
5
Unit
W
R
FLAT(ON)
W
Off Leakage Current, Pin 2
(Figure 3)
Off Leakage Current, Pin 1
(Figure 3)
I
NO(OFF)
5.5
1
10
100
nA
I
COM(OFF)
5.5
1
10
100
nA
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns)
Guaranteed Max Limit
V
CC
Parameter
Turn−On Time
Test Conditions
R
L
= 300
W,
C
L
= 35 pF
(Figures 4, 5, and 13)
Symbol
t
ON
(V)
2.0
3.0
4.5
5.5
2.0
3.0
4.5
5.5
*55_C
to 25_C
Min
Typ
7.0
5.0
4.5
4.5
11.0
7.0
5.0
5.0
Max
14
10
9
9
22
14
10
10
Min
t85_C
Typ
Max
16
12
11
11
24
16
12
12
Min
t125_C
Typ
Max
16
12
11
11
24
16
12
12
Unit
ns
Turn−Off Time
R
L
= 300
W,
C
L
= 35 pF
(Figures 4, 5, and 13)
t
OFF
ns
Typical @ 25, VCC = 5.0 V
Maximum Input Capacitance, Select Input
Analog I/O (switch off)
Common I/O (switch off)
Feedthrough (switch on)
C
IN
C
NO or
C
NC
C
COM(OFF)
C
COM(ON)
8
10
10
20
pF
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NLAST4501
ADDITIONAL APPLICATION CHARACTERISTICS
(Voltages Referenced to GND Unless Noted)
V
CC
Parameter
Maximum On−Channel −3dB Bandwidth
or Minimum Frequency Response
Maximum Feedthrough On Loss
Condition
V
IS
=
0 dBm
V
IS
centered between V
CC
and GND
(Figures 6 and 14)
V
IS
=
0 dBm @ 10 kHz
V
IS
centered between V
CC
and GND
(Figure 6)
f = 100 kHz; V
IS
=
1 V RMS
V
IS
centered between V
CC
and GND
(Figures 6 and 15)
V
IS =
V
CC
to GND, F
IS
= 20 kHz
t
r
= t
f
= 3 ns
R
IS
= 0
W,
C
L
= 1000 pF
Q = C
L
*
DV
OUT
(Figures 7 and 16)
F
IS
= 20 Hz to 1 MHz, R
L
= Rgen = 600
W,
C
L
= 50 pF
V
IS
= 3.0 V
PP
sine wave
V
IS
= 5.0 V
PP
sine wave
(Figure 17)
Symbol
BW
V
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
5.5
Limit
25°C
190
200
220
*2
*2
*2
*93
Unit
MHz
V
ONL
dB
Off−Channel Isolation
V
ISO
dB
Charge Injection
Enable Input to Common I/O
Q
1.5
3.0
pC
Total Harmonic Distortion
THD
)
Noise
THD
3.3
5.5
0.3
0.15
%
1.00E+05
1.00E+04
1.00E+03
1.00E+02
1.00E+01
1.00E+00
1.00E−01
1.00E−02
1.00E−03
1.00E−04
1.00E−05
1.00E−06
1.00E−07
−
55
−
35
LEAKAGE (pA)
I
COM(ON)
I
COM(OFF)
I
NO(OFF)
−
15
5
25
45
65
85
105 125 145
TEMPERATURE (_C)
Figure 3. Switch Leakage vs. Temperature
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4
NLAST4501
V
CC
DUT
V
CC
0.1
mF
300
W
NO
COM
V
OUT
35 pF
Output
V
OL
t
ON
t
OFF
Input
0V
V
OH
90%
90%
50%
50%
Input
Figure 4. t
ON
/t
OFF
V
CC
DUT
NO
COM
V
OUT
35 pF
300
W
Input
V
CC
50%
0V
V
OH
Output
V
OL
10%
t
OFF
t
ON
10%
50%
Input
Figure 5. t
ON
/t
OFF
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5