MX29SL800CBXHI-90G datasheet, PDF

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MX29SL800CBXHI-90G: Description512K X 16 FLASH 1.8V PROM, 90 ns, PBGA48; Categorystorage storage; File Size865KB，60 Pages; ManufacturerMacronix; Websitehttp://www.macronix.com/en-us/Pages/default.aspx; Environmental Compliance

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MX29SL800CBXHI-90G Overview

512K X 16 FLASH 1.8V PROM, 90 ns, PBGA48

MX29SL800CBXHI-90G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Macronix
Parts packaging code	BGA
package instruction	VFBGA, BGA48,6X11,20
Contacts	48
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Universal Flash Interface	YES
Data polling	YES
JESD-30 code	R-PBGA-B48
JESD-609 code	e1
length	6 mm
memory density	8388608 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,15
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA48,6X11,20
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8/2 V
Programming voltage	1.8 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	0.75 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.025 mA
Maximum supply voltage (Vsup)	2.2 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	YES
type	NOR TYPE
width	5 mm

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MX29SL800C T/B

MX29SL802C T/B

8M-BIT [1M x 8 / 512K x 16] SINGLE VOLTAGE

1.8V ONLY FLASH MEMORY

FEATURES

GENERAL FEATURES

• Single Power Supply Operation

- 1.65 to 2.2 volt for read, erase, and program operations

• 1,048,576 x 8 / 524,288 x 16 switchable

• Boot Sector Architecture

- T = Top Boot Sector

- B = Bottom Boot Sector

• Sector Structure

- 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 15

• Sector protection

- Hardware method to disable any combination of sectors from program or erase operations

- Temporary sector unprotected allows code changes in previously locked sectors

• Latch-up protected to 100mA from -1V to Vcc + 1V

• Compatible with JEDEC standard

- Pinout and software compatible to single power supply Flash

PERFORMANCE

• High Performance

- Access time: 90ns

- Byte/Word program time: 12us/18us (typical)

- Erase time: 1.3s/sector, 18s/chip (typical)

• Low Power Consumption

- Low active read current: 6mA (maximum) at 5MHz

- Low standby current: 1uA (typical)

• Minimum 100,000 erase/program cycle

• 10 years data retention

SOFTWARE FEATURES

• Erase Suspend/ Erase Resume

- Suspends sector erase operation to read data from or program data to another sector which is not being erased

• Status Reply

- Data# Polling & Toggle bits provide detection of program and erase operation completion

• Support Common Flash Interface (CFI)

HARDWARE FEATURES

• Ready/Busy# (RY/BY#) Output

- Provides a hardware method of detecting program and erase operation completion

• Hardware Reset (RESET#) Input

- Provides a hardware method to reset the internal state machine to read mode

PACKAGE

• 48-Pin TSOP

• 48-Ball CSP (LFBGA/TFBGA/WFBGA)

• 48-Ball XFLGA

•

All Pb-free devices are RoHS Compliant

P/N:PM1244

REV. 2.0, NOV. 20, 2008

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