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MX29F400CTMI-90G

Description
256K X 16 FLASH 5V PROM, 70 ns, PDSO48
Categorystorage    storage   
File Size741KB,47 Pages
ManufacturerMacronix
Websitehttp://www.macronix.com/en-us/Pages/default.aspx
Environmental Compliance
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MX29F400CTMI-90G Overview

256K X 16 FLASH 5V PROM, 70 ns, PDSO48

MX29F400CTMI-90G Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMacronix
Parts packaging codeSOIC
package instructionSOP, SOP44,.63
Contacts44
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time90 ns
Other featuresTOP BOOT BLOCK
Spare memory width8
startup blockTOP
command user interfaceYES
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G44
JESD-609 codee3
length28.5 mm
memory density4194304 bi
Memory IC TypeFLASH
memory width16
Humidity sensitivity level3
Number of functions1
Number of departments/size1,2,1,7
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX16
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP44,.63
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
ready/busyYES
Maximum seat height3 mm
Department size16K,8K,32K,64K
Maximum standby current0.000005 A
Maximum slew rate0.05 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
switch bitYES
typeNOR TYPE
width12.6 mm
Maximum write cycle time (tWC)90 ms
MX29F400C T/B
4M-BIT [512K x 8 / 256K x 16] SINGLE VOLTAGE
5V ONLY FLASH MEMORY
FEATURES
GENERAL FEATURES
• Single Power Supply Operation
- 4.5 to 5.5 volt for read, erase, and program operations
• 524,288 x 8 / 262,144 x 16 switchable
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Sector Structure
- 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 7
• Sector protection
- Hardware method to disable any combination of sectors from program or erase operations
- Temporary sector unprotected allows code changes in previously locked sectors
• Latch-up protected to 100mA from -1V to Vcc + 1V
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
PERFORMANCE
• High Performance
- Access time: 70/90ns
- Byte/Word program time: 9us/11us (typical)
- Erase time: 0.7s/sector, 4s/chip (typical)
• Low Power Consumption
- Low active read current: 40mA (maximum) at 5MHz
- Low standby current: 1uA (typical)
• Minimum 100,000 erase/program cycle
• 20 years data retention
SOFTWARE FEATURES
• Erase Suspend/ Erase Resume
- Suspends sector erase operation to read data from or program data to another sector which is not being
erased
• Status Reply
- Data# Polling & Toggle bits provide detection of program and erase operation completion
HARDWARE FEATURES
• Ready/Busy# (RY/BY#) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET#) Input
- Provides a hardware method to reset the internal state machine to read mode
PACKAGE
• 44-Pin SOP
• 48-Pin TSOP
All devices are RoHS Compliant
All non RoHS Compliant devices are not recommeded for new design in
P/N:PM1200
Rev. 2.3, December 14, 2017
1

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