STM32H743XI datasheet, PDF - EEWORLD Datasheet

STM32H743XI: DescriptionHigh-performance ARM Cortex-M7 MCU with DSP and DP-FPU with 2 MB Flash, 1 MB RAM, 480 MHz CPU, ART accelerator, L1 cache, external memory interface and extensive peripherals; File Size5MB，357 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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STM32H743XI Overview

High-performance ARM Cortex-M7 MCU with DSP and DP-FPU with 2 MB Flash, 1 MB RAM, 480 MHz CPU, ART accelerator, L1 cache, external memory interface and extensive peripherals

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STM32H742xI/G STM32H743xI/G

32-bit Arm

Cortex

-M7 480MHz MCUs, up to 2MB Flash,

up to 1MB RAM, 46 com. and analog interfaces

Datasheet

production data

Features

Core

•

32-bit Arm

Cortex

-M7 core with double-

precision FPU and L1 cache: 16 Kbytes of data

and 16 Kbytes of instruction cache; frequency

up to 480 MHz, MPU, 1027 DMIPS/

2.14 DMIPS/MHz (Dhrystone 2.1), and DSP

instructions

LQFP100

(14 x 14 mm)

LQFP144

(20 x 20 mm)

LQFP176

(24 x 24 mm)

LQFP208

(28 x 28 mm)

FBGA

TFBGA100

(8 x 8 mm)

(1)

TFBGA240+25

(14 x 14 mm)

UFBGA169

(7 x 7 mm)

UFBGA176+25

(10 x 10 mm)

Memories

•

Up to 2 Mbytes of Flash memory with read-

while-write support

•

Up to 1 Mbyte of RAM: 192 Kbytes of TCM

RAM (inc. 64 Kbytes of ITCM RAM +

128 Kbytes of DTCM RAM for time critical

routines), Up to 864 Kbytes of user SRAM, and

4 Kbytes of SRAM in Backup domain

•

Dual mode Quad-SPI memory interface

running up to 133 MHz

•

Flexible external memory controller with up to

32-bit data bus: SRAM, PSRAM,

SDRAM/LPSDR SDRAM, NOR/NAND Flash

memory clocked up to 100 MHz in

Synchronous mode

•

CRC calculation unit

•

1.62 to 3.6 V application supply and I/Os

•

POR, PDR, PVD and BOR

•

Dedicated USB power embedding a 3.3 V

internal regulator to supply the internal PHYs

•

Embedded regulator (LDO) with configurable

scalable output to supply the digital circuitry

•

Voltage scaling in Run and Stop mode (6

configurable ranges)

•

Backup regulator (~0.9 V)

•

Voltage reference for analog peripheral/V

REF+

•

Low-power modes: Sleep, Stop, Standby and

BAT

supporting battery charging

Low-power consumption

•

BAT

battery operating mode with charging

capability

•

CPU and domain power state monitoring pins

•

2.95 µA in Standby mode (Backup SRAM OFF,

RTC/LSE ON)

Security

•

ROP, PC-ROP, active tamper

General-purpose input/outputs

•

Up to 168 I/O ports with interrupt capability

Clock management

•

Internal oscillators: 64 MHz HSI, 48 MHz

HSI48, 4 MHz CSI, 32 kHz LSI

•

External oscillators: 4-48 MHz HSE,

32.768 kHz LSE

•

3× PLLs (1 for the system clock, 2 for kernel

clocks) with Fractional mode

Reset and power management

•

3 separate power domains which can be

independently clock-gated or switched off:

– D1: high-performance capabilities

– D2: communication peripherals and timers

– D3: reset/clock control/power management

April 2019

This is information on a product in full production.

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STM32H742xI/G STM32H743xI/G

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.1

3.2

3.3

Arm

Cortex

-M7 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Memory protection unit (MPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.3.1

3.3.2

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4

3.5

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.5.1

3.5.2

3.5.3

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

3.6

3.7

Low-power strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Reset and clock controller (RCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.7.1

3.7.2

Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

System reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.8

3.9

3.10

3.11

3.12

3.13

3.14

3.15

3.16

3.17

3.18

3.19

3.20

General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Bus-interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

DMA controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Chrom-ART Accelerator™ (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 35

Extended interrupt and event controller (EXTI) . . . . . . . . . . . . . . . . . . . . 35

Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 35

Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 36

Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

BAT

operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Digital-to-analog converters (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

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3.21

3.22

3.23

3.24

3.25

3.26

3.27

3.28

Ultra-low-power comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Operational amplifiers (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Digital filter for sigma-delta modulators (DFSDM) . . . . . . . . . . . . . . . . . . 39

Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

JPEG Codec (JPEG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

3.28.1

3.28.2

3.28.3

3.28.4

3.28.5

3.28.6

3.28.7

3.28.8

High-resolution timer (HRTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 44

General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Low-power timers (LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5) . . . . 45

Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.29

3.30

3.31

3.32

3.33

3.34

3.35

3.36

3.37

3.38

3.39

3.40

3.41

3.42

3.43

Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 46

Inter-integrated circuit interface (I

C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Universal synchronous/asynchronous receiver transmitter (USART) . . . 47

Low-power universal asynchronous receiver transmitter (LPUART) . . . . 48

Serial peripheral interface (SPI)/inter- integrated sound interfaces (I2S) . 49

Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

SPDIFRX Receiver Interface (SPDIFRX) . . . . . . . . . . . . . . . . . . . . . . . . . 50

Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 50

Management Data Input/Output (MDIO) slaves . . . . . . . . . . . . . . . . . . . . 51

SD/SDIO/MMC card host interfaces (SDMMC) . . . . . . . . . . . . . . . . . . . . 51

Controller area network (FDCAN1, FDCAN2) . . . . . . . . . . . . . . . . . . . . . 51

Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 52

Ethernet MAC interface with dedicated DMA controller (ETH) . . . . . . . . . 52

High-definition multimedia interface (HDMI)

- consumer electronics control (CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Debug infrastructure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

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Contents

Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Electrical characteristics (rev Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

6.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

6.1.1

6.1.2

6.1.3

6.1.4

6.1.5

6.1.6

6.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 106

6.2

6.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

6.3.1

6.3.2

6.3.3

6.3.4

6.3.5

6.3.6

6.3.7

6.3.8

6.3.9

6.3.10

6.3.11

6.3.12

6.3.13

6.3.14

6.3.15

6.3.16

6.3.17

6.3.18

6.3.19

6.3.20

6.3.21

6.3.22

6.3.23

6.3.24

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

VCAP external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . 109

Embedded reset and power control block characteristics . . . . . . . . . . 110

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 125

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 130

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 137

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146

FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

Quad-SPI interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 167

Delay block (DLYB) characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

16-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

Voltage reference buffer characteristics . . . . . . . . . . . . . . . . . . . . . . . 178

Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 179

Temperature and V

BAT

monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180

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	STM32H743XI	STM32H743ZI
Description	High-performance ARM Cortex-M7 MCU with DSP and DP-FPU with 2 MB Flash, 1 MB RAM, 480 MHz CPU, ART accelerator, L1 cache, external memory interface and extensive peripherals	High-performance ARM Cortex-M7 MCU with DSP and DP-FPU with 2 MB Flash, 1 MB RAM, 480 MHz CPU, ART accelerator, L1 cache, external memory interface and extensive peripherals

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