STM32H723VE STM32H723VG
STM32H723ZE STM32H723ZG
32-bit Arm
®
Cortex
®
-M7 550 MHz MCU, up to 1 MB Flash memory,
564 KB RAM, 35 comms peripherals and analog interfaces
Datasheet
-
production data
Features
Core
•
32-bit Arm
®
Cortex
®
-M7 CPU with DP-FPU, L1
cache: 32-Kbyte data cache and 32-Kbyte
instruction cache allowing 0-wait state
execution from embedded Flash memory and
external memories, frequency up to 550 MHz,
MPU, 1177 DMIPS/2.14 DMIPS/MHz
(Dhrystone 2.1), and DSP instructions
LQFP100
(14x14 mm)
FBGA
LQFP144
(20x20 mm)
FBGA
TFBGA100
(8x8 mm)
UFBGA144
(7x7 mm)
Memories
•
Up to 1 Mbyte of embedded Flash memory with
ECC
•
SRAM: total 564 Kbytes all with ECC, including
128 Kbytes of data TCM RAM for critical real-
time data + 432 Kbytes of system RAM (up to
256 Kbytes can remap on instruction TCM
RAM for critical real time instructions) +
4 Kbytes of backup SRAM (available in the
lowest-power modes)
•
Flexible external memory controller with up to
16-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND
memories
•
2 x Octo-SPI interface with XiP
•
2 x SD/SDIO/MMC interface
•
Bootloader
Clock, reset and supply management
•
1.62 V to 3.6 V application supply and I/O
•
POR, PDR, PVD and BOR
•
Dedicated USB power
•
Embedded LDO regulator
•
Internal oscillators: 64 MHz HSI, 48 MHz
HSI48, 4 MHz CSI, 32 kHz LSI
•
External oscillators: 4-50 MHz HSE,
32.768 kHz LSE
Low power
•
Sleep, Stop and Standby modes
•
V
BAT
supply for RTC, 32×32-bit backup
registers
Graphics
•
Chrom-ART Accelerator graphical hardware
accelerator enabling enhanced graphical user
interface to reduce CPU load
•
LCD-TFT controller supporting up to XGA
resolution
Analog
•
2×16-bit ADC, up to 3.6 MSPS in 16-bit: up to
18 channels and 7.2 MSPS in double-
interleaved mode
•
1 x 12-bit ADC, up to 5 MSPS in 12-bit, up to 12
channels
•
2 x comparators
•
2 x operational amplifier GBW = 8 MHz
•
2× 12-bit D/A converters
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STM32H723xE/G
Digital filters for sigma delta modulator
(DFSDM)
•
8 channels/4 filters
•
SWPMI single-wire protocol master I/F
•
MDIO slave interface
Mathematical acceleration
•
CORDIC for trigonometric functions
acceleration
•
FMAC: Filter mathematical accelerator
4 DMA controllers to offload the CPU
•
1 × MDMA with linked list support
•
2 × dual-port DMAs with FIFO
•
1 × basic DMA with request router capabilities
Digital temperature sensor
True random number generator
CRC calculation unit
RTC with sub-second accuracy and
hardware calendar
ROP, PC-ROP, tamper detection
96-bit unique ID
All packages are ECOPACK2 compliant
24 timers
•
Seventeen 16-bit (including 5 x low power
16-bit timer available in stop mode) and four
32-bit timers, each with up to 4 IC/OC/PWM or
pulse counter and quadrature (incremental)
encoder input
•
2x watchdogs, 1x SysTick timer
Debug mode
•
SWD and JTAG interfaces
•
2-Kbyte embedded trace buffer
Up to 114 I/O ports with interrupt
capability
Up to
35
communication interfaces
•
Up to 5 × I2C FM+ interfaces
(SMBus/PMBus™)
•
Up to 5 USARTs/5 UARTs (ISO7816 interface,
LIN, IrDA, modem control) and 1 x LPUART
•
Up to 6 SPIs with 4 with muxed duplex I2S for
audio class accuracy via internal audio PLL or
external clock and up to 5 x SPI (from 5 x
USART when configured in synchronous
mode)
•
2x SAI (serial audio interface)
•
1× FD/TT-CAN and 2xFD-CAN
•
8- to 14-bit camera interface
•
16-bit parallel slave synchronous interface
•
SPDIF-IN interface
•
HDMI-CEC
•
Ethernet MAC interface with DMA controller
•
USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip FS PHY and ULPI for external
HS PHY
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Contents
Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1
3.2
3.3
Arm
®
Cortex
®
-M7 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Memory protection unit (MPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3.1
3.3.2
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Error code correction (ECC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
3.4
3.5
3.6
3.7
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CORDIC co-processor (CORDIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CORDIC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Filter mathematical accelerator (FMAC) . . . . . . . . . . . . . . . . . . . . . . . . . . 24
FMAC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.7.1
3.7.2
3.7.3
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.8
3.9
Low-power strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Reset and clock controller (RCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.9.1
3.9.2
Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
System reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.10
3.11
3.12
3.13
3.14
3.15
3.16
3.17
3.18
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Bus-interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DMA controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Chrom-ART Accelerator (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 31
Extended interrupt and event controller (EXTI) . . . . . . . . . . . . . . . . . . . . 31
Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 31
Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Octo-SPI memory interface (OCTOSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 32
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Contents
STM32H723xE/G
3.19
3.20
3.21
3.22
3.23
3.24
3.25
3.26
3.27
3.28
3.29
3.30
3.31
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Digital temperature sensor (DTS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Digital-to-analog converters (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Ultra-low-power comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Operational amplifiers (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Digital filter for sigma-delta modulators (DFSDM) . . . . . . . . . . . . . . . . . . 36
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
PSSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
True random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.31.1
3.31.2
3.31.3
3.31.4
3.31.5
3.31.6
3.31.7
Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 42
General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Low-power timers (LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5) . . . . 43
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.32
3.33
3.34
3.35
3.36
3.37
3.38
3.39
3.40
3.41
3.42
3.43
3.44
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 44
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Universal synchronous/asynchronous receiver transmitter (USART) . . . 45
Low-power universal asynchronous receiver transmitter (LPUART) . . . . 46
Serial peripheral interface (SPI)/inter- integrated sound interfaces (I2S) . 47
Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
SPDIFRX Receiver Interface (SPDIFRX) . . . . . . . . . . . . . . . . . . . . . . . . . 48
Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 48
Management data input/output (MDIO) slaves . . . . . . . . . . . . . . . . . . . . . 49
SD/SDIO/MMC card host interfaces (SDMMC) . . . . . . . . . . . . . . . . . . . . 49
Controller area network (FDCAN1, FDCAN2, FDCAN3) . . . . . . . . . . . . . 49
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 50
Ethernet MAC interface with dedicated DMA controller (ETH) . . . . . . . . . 50
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Contents
3.45
3.46
High-definition multimedia interface (HDMI)
- consumer electronics control (CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Debug infrastructure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4
5
6
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Pinouts, pin descriptions and alternate functions . . . . . . . . . . . . . . . . 53
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
6.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
6.2
6.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
VCAP external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 93
Embedded reset and power control block characteristics . . . . . . . . . . . 94
Embedded reference voltage characteristics . . . . . . . . . . . . . . . . . . . . . 95
Embedded USB regulator characteristics . . . . . . . . . . . . . . . . . . . . . . . 96
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Typical and maximum current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97
I/O system current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
6.3.8
6.3.9
Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 104
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 105
High-speed external user clock generated from an external source . . . . . . . . .105
Low-speed external user clock generated from an external source . . . . . . . . . .106
High-speed external clock generated from a crystal/ceramic resonator. . . . . . .107
Low-speed external clock generated from a crystal/ceramic resonator . . . . . . .108
6.3.10
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 109
48 MHz high-speed internal RC oscillator (HSI48) . . . . . . . . . . . . . . . . . . . . . . .109
64 MHz high-speed internal RC oscillator (HSI) . . . . . . . . . . . . . . . . . . . . . . . . .110
4 MHz low-power internal RC oscillator (CSI) . . . . . . . . . . . . . . . . . . . . . . . . . .111
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