CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
2. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Parameters with MIN and/or MAX limits are 100% tested at +25°C, V+ = 0V unless otherwise specified.
Temperature limits established by characterization and are not production tested.
ICL7667C, M
T
A
= +25°C
ICL7667M
0°C
≤
T
A
≤
+70°C
MAX
MIN
TYP
MAX
UNITS
PARAMETER
DC SPECIFICATIONS
Logic 1 Input Voltage
Logic 1 Input Voltage
Logic 0 Input Voltage
Logic 0 Input Voltage
Input Current
Output Voltage High
Output Voltage Low
Output Resistance
Output Resistance
Power Supply Current
Power Supply Current
SYMBOL
TEST CONDITIONS
MIN
TYP
V
IH
V
IH
V
IL
V
IL
I
IL
V
OH
V
OL
R
OUT
R
OUT
I
CC
I
CC
V+ = 4.5V
V+V+ = 15V
V+ = 4.5V
V+ = 15V
V+ = 15V, V
IN
= 0V and 15V
V+ = 4.5V and 15V
V+ = 4.5V and 15V
V
IN
= V
IL
, I
OUT
= -10mA, V+ = 15V
V
IN
= V
IH
, I
OUT
= 10mA, V+ = 15V
V+ = 15V, V
IN
= 3V both inputs
V+ = 15V, V
IN
= 0V both inputs
2.0
2.0
-
-
-0.1
V+ -0.05
-
-
-
-
-
-
-
-
-
-
V+
0
7
8
5
150
-
-
0.8
0.8
0.1
-
0.05
10
12
7
400
2.0
2.0
-
-
-0.1
V+ -0.1
-
-
-
-
-
-
-
-
-
-
V+
-
-
-
-
-
-
-
0.5
0.5
0.1
-
0.1
12
13
8
400
V
V
V
V
µA
V
V
Ω
Ω
mA
µA
SWITCHING SPECIFICATIONS
Delay Time
Rise Time
Fall Time
Delay Time
T
D2
T
R
T
F
T
D1
(Figure 3)
(Figure 3)
(Figure 3)
(Figure 3)
-
-
-
-
35
20
20
20
50
30
30
30
-
-
-
-
-
-
-
-
60
40
40
40
ns
ns
ns
ns
2
FN2853.6
April 29, 2010
ICL7667
Test Circuits
V+ = 15V
+5V
+
4.7
µ
F
INPUT
ICL7667
INPUT RISE AND
FALL TIMES
≤
10ns
INPUT
0.1
µ
F
10%
90%
≈
0.4V
OUTPUT
C
L
= 1000pF
15V
T
D1
t
f
90%
T
D2
t
r
90%
OUTPUT
0V
10%
10%
Typical Performance Curves
1µs
V+ = 15V
100
90
80
100
t
r
AND t
f
(ns)
t
RISE
10
t
FALL
1
10
100
1000
C
L
(pF)
10k
100k
T
D1
AND T
D2
(ns)
70
60
50
40
30
20
10
0
-55
0
25
70
TEMPERATURE (°C)
125
T
D1
T
D2
C
L
= 1nF
V+ = 15V
FIGURE 1. RISE AND FALL TIMES vs C
L
50
C
L
= 1nF
V+ = 15V
t
r
AND t
f
t
r
AND t
f
(ns)
30
I
V+
(mA)
10
30
FIGURE 2. T
D1
, T
D2
vs TEMPERATURE
V+ = 15V
200kHz
40
20kHz
20
3.0
10
0
-55
0
25
70
125
TEMPERATURE (°C)
1.0
10
100
1k
C
L
(pF)
10k
100k
FIGURE 3. t
r
, t
f
vs TEMPERATURE
FIGURE 4. I
V+
vs C
L
3
FN2853.6
April 29, 2010
ICL7667
Typical Performance Curves
(Continued)
100
100
I
V+
(mA)
I
V+
(mA)
V+ = 15V
10
V+ = 5V
1
10
V+ = 15V
1
C
L
= 1nF
100k
1M
10M
100mA
10k
100k
V+ = 5V
C
L
= 10pF
1M
10M
100µA
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. I
V+
vs FREQUENCY
50
50
FIGURE 6. NO LOAD I
V+
vs FREQUENCY
40
40
t
r
AND t
D2
(ns)
t
D1
AND t
f
(ns)
30
t
f
20
t
D1
10
C
L
= 1nF
0
5
10
V+
(V)
15
30
t
r
= T
D2
20
10
C
L
= 10pF
0
5
10
V+
(V)
15
FIGURE 7. DELAY AND FALL TIMES vs V+
FIGURE 8. RISE TIME vs V+
Detailed Description
The ICL7667 is a dual high-power CMOS inverter whose
inputs respond to TTL levels while the outputs can swing as
high as 15V. Its high output current enables it to rapidly
charge and discharge the gate capacitance of power
MOSFETs, minimizing the switching losses in switchmode
power supplies. Since the output stage is CMOS, the output
will swing to within millivolts of both V- and V+ without any
external parts or extra power supplies as required by the
DS0026/56 family. Although most specifications are at
V+ = 15V, the propagation delays and specifications are
almost independent of V+.
In addition to power MOS drivers, the ICL7667 is well suited
for other applications such as bus, control signal, and clock
drivers on large memory of microprocessor boards, where
the load capacitance is large and low propagation delays are
required. Other potential applications include peripheral
power drivers and charge-pump voltage inverters.
4
Input Stage
The input stage is a large N-Channel FET with a P-Channel
constant-current source. This circuit has a threshold of about
1.5V, relatively independent of the V+ voltage. This means
that the inputs will be directly compatible with TTL over the
entire 4.5V - 15V V+ range. Being CMOS, the inputs draw
less than 1µA of current over the entire input voltage range
of V- to V+. The quiescent current or no load supply current
of the ICL7667 is affected by the input voltage, going to
nearly zero when the inputs are at the 0 logic level and rising
to 7mA maximum when both inputs are at the 1 logic level. A
small amount of hysteresis, about 50mV to 100mV at the
input, is generated by positive feedback around the second
stage.
Output Stage
The ICL7667 output is a high-power CMOS inverter,
swinging between V- and V+. At V+ = 15V, the output
impedance of the inverter is typically 7Ω. The high peak
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