EEWORLDEEWORLDEEWORLD

Part Number

Search

530RC317M000DGR

Description
LVPECL Output Clock Oscillator, 317MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530RC317M000DGR Overview

LVPECL Output Clock Oscillator, 317MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530RC317M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Is SamacsysN
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency317 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
How to Reduce Ground Bounce Noise in DC-DC Wiring
In addition to the loop minimization principle in wiring, there is also a loop change minimization principle, which is of great significance for reducing DC-DC ground bounce. ADI has an article specif...
tonytong Power technology
CC2640R2F supports Alibaba Cloud Link IoT platform
CC2640R2F has supported Alibaba Cloud Link IoT platform, which can help customers quickly develop products. There are routines available for customers. For detailed introduction, please refer to the f...
灞波儿奔 Wireless Connectivity
Why can't I install the ce6.0 update in Windows 7?
I just bought a computer, it's a genuine Windows 7, I don't want to delete it, I saw someone install ce6.0, I tried it, it can be installed, but the monthly update can't be installed. Has anyone encou...
aug_com Embedded System
Weekly highlights: 2018.4.9-4.15
[size=4]Hi, good afternoon everyone~~I am late for today's summary~~How was your life last week? I had a bit of tragedy. I fell downstairs and was very sad. I need everyone to read and reply to the po...
okhxyyo Talking
Zhihuijun's new open source for National Day: Iron Man's robotic arm Dummy, interesting interactions, sewing grape demo, Hongmeng...
I have shared with you Zhihui Jun's dry goods before: It is worth reading carefully: [Self-made FOC driver] explains the FOC algorithm and SVPWM technology in simple terms , which is prepared for the ...
蓝猫淘气 Motor Drive Control(Motor Control)
IAP command saves data, which can only be saved within the 32k range
As the title says, is it because my MDK5.12 is a limited version? Is there any expert who can give me some advice? I am using LPC2138 512KFlash....
哎吆我去 NXP MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2109  12  122  2357  1688  43  1  3  48  34 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号