PI74FCT162H501ETV datasheet, PDF

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PI74FCT162H501ETV: DescriptionRegistered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56; Categorylogic logic; File Size77KB，8 Pages; ManufacturerPericom Semiconductor Corporation (Diodes Incorporated); Websitehttps://www.diodes.com/

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PI74FCT162H501ETV Overview

Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56

PI74FCT162H501ETV Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code	SSOP
package instruction	0.300 INCH, PLASTIC, SSOP-56
Contacts	56
Reach Compliance Code	unknown
ECCN code	EAR99
Is Samacsys	N
Other features	WITH INDEPENDENT O/P ENABLE FOR EACH DIRECTION; BUS HOLD I/P'S
Control type	INDEPENDENT CONTROL
Counting direction	BIDIRECTIONAL
series	FCT
JESD-30 code	R-PDSO-G56
JESD-609 code	e0
length	18.415 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
MaximumI(ol)	0.024 A
Number of digits	18
Number of functions	1
Number of ports	2
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP56,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Sup	3.8 ns
propagation delay (tpd)	4.2 ns
Certification status	Not Qualified
Maximum seat height	2.74 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
translate	N/A
Trigger type	POSITIVE EDGE
width	7.5 mm
Base Number Matches	1

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PI74FCT16501/162501/162H501T

PI74FCT16501T

18-BIT REGISTERED TRANSCEIVERS

PI74FCT162501T

PI74FCT162H501T

Fast CMOS 18-Bit

Registered Transceivers

Product Features

Common Features:

• PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T

are high-speed,

low power devices with high current drive.

• V

= 5V ±10%

• Hysteresis on all inputs

• Packages available

– 56-pin 240 mil wide plastic TSSOP (A)

– 56-pin 300 mil wide plastic SSOP (V)

PI74FCT16501T Features

• High output drive: I

= –32 mA; I

= 64 mA

• Power off disable outputs permit “live insertion”

• Typical V

OLP

(Output Ground Bounce) < 1.0V

at V

= 5V, T

= 25°C

PI74FCT162501T Features

• Balanced output drivers: ±24 mA

• Reduced system switching noise

• Typical V

OLP

(Output Ground Bounce) < 0.6V

at V

= 5V, T

= 25°C

PI74FCT162H501T Features

• Bus Hold retains last active bus state during 3-state

• Eliminates the need for external pull-up resistors

Product Description

Pericom Semiconductor’s PI74FCT series of logic circuits are pro-

duced in the Company’s advanced 0.6 micron CMOS technology,

achieving industry leading speed grades.

The PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T

are 18-bit are registered bus transceivers designed with D-type

latches and flip-flops to allow data flow in transparent, latched, and

clocked modes. The Output Enable (OEAB and OEBA, Latch

Enable (LEAB and LEBA) and Clock (CLKAB and CLKBA)

inputs control the data flow in each direction. When LEAB is

HIGH, the device operates in transparent mode for A-to-B data

flow. When LEAB is LOW, the A data is latched if CLKAB is held

at a HIGH or LOW logic level. The A bus data is stored in the latch/

flip-flop on the LOW-to-HIGH transition of CLKAB, if LEAB is LOW.

OEAB performs the output enable function on the B port. Data flow

from B port to A port is similar using OEBA, LEBA and CLKBA.

These high-speed, low power devices offer a flow-through

organization for ease of board layout.

The PI74FCT16501T output buffers are designed with a Power-Off

disable allowing "live insertion" of boards when used as backplane

drivers.

The PI74FCT162501T has ±24 mA balanced output drivers. It is

designed with current limiting resistors at its outputs to control the

output edge rate resulting in lower ground bounce and undershoot.

This eliminates the need for external terminating resistors for most

interface applications.

The PI74FCT162H501T has “Bus Hold” which retains the input’s

last state whenever the input goes to high-impedance preventing

“floating” inputs and eliminating the need for pull-up/down resistors.

Logic Block Diagram

OEAB

CLKBA

LEBA

OEBA

CLKAB

LEAB

TO 17 OTHER CHANNELS

PS2035A 03/11/96

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