MP
C50
8
MPC508A
MPC509A
MP
C50
9
SBFS019A – JANUARY 1988 — REVISED OCTOBER 2003
Single-Ended 8-Channel/Differential 4-Channel
CMOS ANALOG MULTIPLEXERS
FEATURES
q
q
q
q
q
q
ANALOG OVERVOLTAGE PROTECTION: 70V
PP
NO CHANNEL INTERACTION DURING
OVERVOLTAGE
BREAK-BEFORE-MAKE SWITCHING
ANALOG SIGNAL RANGE:
±
15V
STANDBY POWER: 7.5mW typ
TRUE SECOND SOURCE
1kΩ
In 8
1kΩ
In 2
Decoder/
Driver
1kΩ
In 1
Out
FUNCTIONAL DIAGRAMS
DESCRIPTION
The MPC508A is an 8-channel single-ended analog
multiplexer and the MPC509A is a 4-channel differential
multiplexer.
The MPC508A and MPC509A multiplexers have input
overvoltage protection. Analog input voltages may exceed
either power supply voltage without damaging the device or
disturbing the signal path of other channels. The protection
circuitry assures that signal fidelity is maintained even under
fault conditions that would destroy other multiplexers. Analog
inputs can withstand 70V
PP
signal levels and standard ESD
tests. Signal sources are protected from short circuits should
multiplexer power loss occur; each input presents a 1kΩ
resistance under this condition. Digital inputs can also sustain
continuous faults up to 4V greater than either supply voltage.
These features make the MPC508A and MPC509A ideal for
use in systems where the analog signals originate from
external equipment or separately powered sources.
The MPC508A and MPC509A are fabricated with Burr-
Brown’s dielectrically isolated CMOS technology. The
multiplexers are available in plastic DIP and plastic SOIC
packages. Temperature range is –40°C to +85°C.
Overvoltage
Clamp and
Signal
Isolation
NOTE: (1) Digital
Input Protection.
MPC508A
5V
Ref
Level
Shift
(1) (1)
(1)
(1)
A
0
A
1
A
2
EN
1kΩ
In 1A
1kΩ
In 4A
1kΩ
In 1B
1kΩ
In 4B
Overvoltage
Clamp and
Signal
Isolation
NOTE: (1) Digital
Input Protection.
MPC509A
Out B
Decoder/
Driver
Out A
5V
Ref
Level
Shift
(1) (1)
(1)
A
0
A
1
EN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998-2003, Texas Instruments Incorporated
www.ti.com
ELECTRICAL CHARACTERISTICS
Supplies = +15V, –15V; V
AH
(Logic Level High) = +4.0V, V
AL
(Logic Level Low) = +0.8V, unless otherwise specified.
MPC508A/509A
PARAMETER
ANALOG CHANNEL CHARACTERISTICS
V
S
, Analog Signal Range
R
ON
, On Resistance
(1)
I
S
(OFF), Off Input Leakage Current
I
D
(OFF), Off Output Leakage Current
MPC508A
MPC509A
I
D
(OFF) with Input Overvoltage Applied
(2)
I
D
(ON), On Channel Leakage Current
MPC508A
MPC509A
I
DIFF
Differential Off Output Leakage Current
(MPC509A Only)
DIGITAL INPUT CHARACTERISTICS
V
AL
, Input Low Threshold Drive
V
AH
, Input High Threshold
(3)
I
A
, Input Leakage Current (High or Low)
(4)
SWITCHING CHARACTERISTICS
t
A
, Access Time
t
OPEN
, Break-Before-Make Delay
t
ON
(EN), Enable Delay (ON)
t
OFF
(EN), Enable Delay (OFF)
Settling Time (0.1%)
(0.01%)
"OFF Isolation"
(5)
C
S
(OFF), Channel Input Capacitance
C
D
(OFF), Channel Output Capacitance: MPC508A
MPC509A
C
A
, Digital Input Capacitance
C
DS
(OFF), Input to Output Capacitance
POWER REQUIREMENTS
P
D
, Power Dissipation
I+, Current Pin 1
(6)
I–, Current Pin 27
(6)
TEMP
MIN
TYP
MAX
UNITS
Full
+25°C
Full
+25°C
Full
+25°C
Full
Full
+25°C
+25°C
Full
Full
Full
–15
1.3
1.5
0.5
0.2
+15
1.5
1.8
10
5
5
2.0
2
10
10
10
V
kΩ
kΩ
nA
nA
nA
nA
nA
µA
nA
nA
nA
nA
Full
Full
Full
0.8
4.0
1.0
V
V
µA
µs
µs
ns
ns
ns
ns
ns
µs
µs
dB
pF
pF
pF
pF
pF
+25°C
Full
+25°C
+25°C
Full
+25°C
Full
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
25°C
+25°C
0.5
0.6
25
80
200
500
250
500
1.2
3.5
68
5
25
12
5
0.1
50
Full
Full
Full
7.5
0.7
5
1.5
20
mW
mA
µA
NOTES: (1) V
OUT
=
±10V,
I
OUT
= –100µA. (2) Analog overvoltage =
±33V.
(3) To drive from DTL/TTL circuits. 1kΩ pull-up resistors to +5.0V supply are recommended.
(4) Digital input leakage is primarily due to the clamp diodes. Typical leakage is less than 1nA at 25°C. (5) V
EN
= 0.8V, R
L
= 1kΩ, C
L
= 15pF, V
S
= 7Vrms, f = 100kHz.
Worst-case isolation occurs on channel 4 due to proximity of the output pins. (6) V
EN
, V
A
= 0V or 4.0V.
2
MPC508A, MPC509A
www.ti.com
SBFS019A
PIN CONFIGURATIONS
Top View
A
0
En
–V
SUPPLY
In 1
In 2
In 3
In 4
Out
1
2
3
4
5
6
7
8
MPC508A (Plastic)
16 A
1
15 A
2
14 Ground
13
+V
SUPPLY
A
0
En
–V
SUPPLY
In 1A
In 2A
In 3A
In 4A
Out A
1
2
3
4
5
6
7
8
Top View
16 A
1
15
Ground
14 +V
SUPPLY
13 In 1B
12 In 2B
11 In 3B
10 In 4B
9
Out B
12 In 5
11 In 6
10 In 7
9
In 8
MPC509 A (Plastic)
TRUTH TABLES
MPC508A
A
2
X
L
L
L
L
H
H
H
H
A
1
X
L
L
H
H
L
L
H
H
A
0
X
L
H
L
H
L
H
L
H
EN
L
H
H
H
H
H
H
H
H
"ON"
CHANNEL
None
1
2
3
4
5
6
7
8
A
1
X
L
L
H
H
A
0
X
L
H
L
H
EN
L
H
H
H
H
MPC509A
"ON"
CHANNEL
PAIR
None
1
2
3
4
ABSOLUTE MAXIMUM RATINGS
(1)
Voltage between supply pins ............................................................... 44V
V+ to ground ........................................................................................ 22V
V– to ground ........................................................................................ 25V
Digital input overvoltage V
EN
, V
A
:
V
SUPPLY
(+) ................................................... +4V
V
SUPPLY
(–) ................................................... –4V
or 20mA, whichever occurs first.
Analog input overvoltage V
S
:
V
SUPPLY
(+) ................................................ +20V
V
SUPPLY
(–) ................................................ –20V
Continuous current, S or D ............................................................... 20mA
Peak current, S or D
(pulsed at 1ms, 10% duty cycle max) ............................................ 40mA
Power dissipation
(2)
.......................................................................... 1.28W
Operating temperature range ........................................... –40°C to +85°C
Storage temperature range ............................................. –65°C to +150°C
NOTE: (1) Absolute maximum ratings are limiting values, applied individu-
ally, beyond which the serviceability of the circuit may be impaired. Func-
tional operation under any of these conditions is not necessarily implied.
(2) Derate 1.28mW/°C above T
A
= +70°C.
PACKAGE/ORDERING INFORMATION
For the most current package and ordering information, see
the Package Option Addendum located at the end of this
data sheet.
MPC508A, MPC509A
SBFS019A
www.ti.com
3
TYPICAL PERFORMANCE CURVES
Typical at +25°C unless otherwise noted.
SETTLING TIME vs
SOURCE RESISTANCE FOR 20V STEP CHANGE
1k
1
CROSSTALK vs SIGNAL FREQUENCY
100
Crosstalk (% of Off Channel Signal)
0.1
R
s
= 100kΩ
Settling Time (µs)
To ±0.01%
10
To ±0.1%
1
0.01
R
s
= 10kΩ
R
s
= 1kΩ
R
s
= 100Ω
0.001
0.1
0.01
0.0001
0.1
1
Source Resistance (kΩ)
10
100
1
10
100
Signal Frequency (Hz)
1k
10k
COMBINED CMR vs
FREQUENCY MPC509A AND INA110
120
Common-Mode Rejection (dB)
100
80
60
40
20
0
1
10
100
Frequency (Hz)
G = 500
G = 100
G = 10
1k
10k
4
MPC508A, MPC509A
www.ti.com
SBFS019A
DISCUSSION OF
PERFORMANCE
DC CHARACTERISTICS
The static or dc transfer accuracy of transmitting the multi-
plexer input voltage to the output depends on the channel ON
resistance (R
ON
), the load impedance, the source impedance,
the load bias current and the multiplexer leakage current.
Single-Ended Multiplexer Static Accuracy
The major contributors to static transfer accuracy for single-
ended multiplexers are:
Source resistance loading error;
Multiplexer ON resistance error;
and, dc offset error caused by both load bias current and
multiplexer leakage current.
Resistive Loading Errors
The source and load impedances will determine the input
resistive loading errors. To minimize these errors:
•
Keep loading impedance as high as possible.
This mini-
mizes the resistive loading effects of the source resis-
tance and multiplexer ON resistance. As a guideline, load
impedances of 10
8
Ω,
or greater, will keep resistive load-
ing errors to 0.002% or less for 1000Ω source imped-
ances. A 10
6
Ω
load impedance will increase source
loading error to 0.2% or more.
Use sources with impedances as low as possible.
1000Ω
source resistance will present less than 0.001% loading
error and 10kΩ source resistance will increase source
loading error to 0.01% with a 10
8
load impedance.
Differential Multiplexer Static Accuracy
Static accuracy errors in a differential multiplexer are diffi-
cult to control, especially when it is used for multiplexing
low-level signals with full-scale ranges of 10mV to 100mV.
The matching properties of the multiplexer, source and
output load play a very important part in determining the
transfer accuracy of the multiplexer. The source impedance
unbalance, common-mode impedance, load bias current mis-
match, load differential impedance mismatch, and common-
mode impedance of the load all contribute errors to the
multiplexer. The multiplexer ON resistance mismatch, leak-
age current mismatch and ON resistance also contribute to
differential errors.
The effects of these errors can be minimized by following the
general guidelines described in this section, especially for
low-level multiplexing applications. Refer to Figure 2.
Load (Output Device) Characteristics
•
Use devices with very low bias current.
Generally, FET
input amplifiers should be used for low-level signals less
than 50mV FSR. Low bias current bipolar input amplifi-
ers are acceptable for signal ranges higher than 50mV
FSR. Bias current matching will determine the input
offset.
The system dc common-mode rejection (CMR) can never
be better than the combined CMR of the multiplexer and
driven load. System CMR will be less than the device
which has the lower CMR figure.
Load impedances, differential and common-mode, should
be 10
10
Ω
or higher.
R
S1
R
ON
I
BIAS
V
M
V
S1
R
S8
R
OFF
I
L
Measured
Voltage
•
•
•
Input resistive loading errors are determined by the follow-
ing relationship (see Figure 1).
Source and Multiplexer Resistive Loading Error
∈
(R
S
+
R
ON
)
=
R
S
+
R
ON
×
100%
R
S
+
R
ON
+
R
L
V
S8
Z
L
where R
S
= source resistance
R
L
= load resistance
R
ON
= multiplexer ON resistance
Input Offset Voltage
Bias current generates an input OFFSET voltage as a result
of the IR drop across the multiplexer ON resistance and
source resistance. A load bias current of 10nA will generate
an offset voltage of 20µV if a 1kΩ source is used. In general,
for the MPC508A, the OFFSET voltage at the output is
determined by:
V
OFFSET
= (I
B
+ I
L
) (R
ON
+ R
S
)
where I
B
= Bias current of device multiplexer is driving
I
L
= Multiplexer leakage current
R
ON
= Multiplexer ON resistance
R
S
= source resistance
FIGURE 1. MPC508A DC Accuracy Equivalent Circuit.
R
S1
R
ON1A
I
BIAS A
Cd/2
I
L
V
S1
R
CM1
R
S1B
R
ON1B
I
BIAS B
Cd/2
Rd/2
R
S4A
R
OFF4A
I
LB
V
S8
R
S48
R
CM4
R
OFF4B
Rd/2
R
CM
Z
L
C
CM
FIGURE 2. MPC509A DC Accuracy Equivalent Circuit.
MPC508A, MPC509A
SBFS019A
www.ti.com
5
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