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EPM7064AEFC256-4

Description
EE PLD, 4.5ns, 64-Cell, CMOS, PBGA256, FINE LINE, BGA-256
CategoryProgrammable logic devices    Programmable logic   
File Size1MB,66 Pages
ManufacturerAltera (Intel)
Download Datasheet Parametric View All

EPM7064AEFC256-4 Overview

EE PLD, 4.5ns, 64-Cell, CMOS, PBGA256, FINE LINE, BGA-256

EPM7064AEFC256-4 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAltera (Intel)
Parts packaging codeBGA
package instructionBGA, BGA256,16X16,40
Contacts256
Reach Compliance Codecompliant
Is SamacsysN
Other featuresYES
maximum clock frequency222.2 MHz
In-system programmableYES
JESD-30 codeS-PBGA-B256
JESD-609 codee0
JTAG BSTYES
length17 mm
Humidity sensitivity level3
Dedicated input times
Number of I/O lines68
Number of macro cells64
Number of terminals256
Maximum operating temperature70 °C
Minimum operating temperature
organize0 DEDICATED INPUTS, 68 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA256,16X16,40
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)220
power supply2.5/3.3,3.3 V
Programmable logic typeEE PLD
propagation delay4.5 ns
Certification statusNot Qualified
Maximum seat height2.1 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width17 mm
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