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PALC20L8Z-35CJSSTD

Description
OT PLD, 35ns, CMOS, CDIP24, SKINNY, CERAMIC, DIP-24
CategoryProgrammable logic devices    Programmable logic   
File Size553KB,19 Pages
ManufacturerAMD
Websitehttp://www.amd.com
Download Datasheet Parametric View All

PALC20L8Z-35CJSSTD Overview

OT PLD, 35ns, CMOS, CDIP24, SKINNY, CERAMIC, DIP-24

PALC20L8Z-35CJSSTD Parametric

Parameter NameAttribute value
Parts packaging codeDIP
package instructionDIP,
Contacts24
Reach Compliance Codeunknown
Is SamacsysN
JESD-30 codeR-GDIP-T24
length31.953 mm
Dedicated input times12
Number of I/O lines6
Number of terminals24
Maximum operating temperature75 °C
Minimum operating temperature
organize12 DEDICATED INPUTS, 6 I/O
Output functionCOMBINATORIAL
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Programmable logic typeOT PLD
propagation delay35 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL EXTENDED
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
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