Advanced Power MOSFET
FEATURES
n
Avalanche Rugged Technology
n
Rugged Gate Oxide Technology
n
Lower Input Capacitance
n
Improved Gate Charge
n
Extended Safe Operating Area
n
Lower Leakage Current : 10
µA
(Max.) @ V
DS
= -100V
n
Lower R
DS(ON)
: 0.912
Ω
(Typ.)
SFM9110
BV
DSS
= -100 V
R
DS(on)
= 1.2
Ω
I
D
= -1.0 A
SOT-223
2
1
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
Characteristic
Drain-to-Source Voltage
Continuous Drain Current (T
A
=25 C)
Continuous Drain Current (T
A
=70 C)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
A
=25 C) *
Linear Derating Factor *
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
o
2
O
1
O
1
O
3
O
o
o
Value
-100
-1.0
-0.7
1
O
Units
V
A
A
V
mJ
A
mJ
V/ns
W
W/ C
o
-8.0
+
20
_
53
-1.0
0.25
-6.5
2.52
0.02
- 55 to +150
o
C
300
Thermal Resistance
Symbol
R
θJA
Characteristic
Junction-to-Ambient *
Typ.
--
Max.
50
Units
o
C/W
*
When mounted on the minimum pad size recommended (PCB Mount).
Rev. A
2001
Fairchild Semiconductor Corporation
SFM9110
Electrical Characteristics
(T
C
=25
o
C unless otherwise specified)
Symbol
BV
DSS
∆BV/∆T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain(“Miller”) Charge
Min. Typ. Max. Units
-100
--
-2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-0.1
--
--
--
--
--
--
1.3
260
50
17
10
20
25
12
9
1.5
4.3
--
--
-4.0
-100
100
-10
-100
1.2
--
335
80
25
30
50
60
35
10
--
--
nC
ns
pF
µA
Ω
S
V
o
P-CHANNEL
POWER MOSFET
Test Condition
V
GS
=0V,I
D
=-250µA
See Fig 7
V
DS
=-5V,I
D
=-250µA
V
GS
=-20V
V
GS
=20V
V
DS
=-100V
V
DS
=-80V,T
C
=125 C
V
GS
=-10V,I
D
=-0.5A
V
DS
=-40V,I
D
=-0.5A
4
O
4
O
o
V/ C I
D
=-250µA
V
nA
V
GS
=0V,V
DS
=-25V,f =1MHz
See Fig 5
V
DD
=-50V,I
D
=-3.6A,
R
G
=24
Ω
See Fig 13
V
DS
=-80V,V
GS
=-10V,
I
D
=-3.6A
See Fig 6 & Fig 12
4
5
OO
4
5
OO
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
1
O
4
O
Min. Typ. Max. Units
--
--
--
--
--
--
--
--
100
0.35
-1.0
-8.0
-3.8
--
--
A
V
ns
µC
Test Condition
Integral reverse pn-diode
in the MOSFET
T
J
=25 C,I
S
=-1.0A,V
GS
=0V
T
J
=25 C,I
F
=-3.6A
di
F
/dt=100A/µs
4
O
o
o
Notes ;
1
O
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2
L=80mH, I =-1.0A, V =-25V, R =27Ω
*
, Starting T =25
o
C
O
AS
DD
G
J
3
_
_
_
O
I
SD
<
-3.6A, di/dt
<
300A/µs, V
DD
<
BV
DSS
, Starting T
J
=25
o
C
4
_
O
Pulse Test : Pulse Width = 250µs, Duty Cycle
<
2%
5
O
Essentially Independent of Operating Temperature
P-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics
1
1
0
Top :
V
GS
-1 V
5
-1 V
0
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom : - 4.5 V
SFM9110
Fig 2. Transfer Characteristics
1
1
0
1
0
0
-I
D
, Drain Current [A]
-I
D
, Drain Current [A]
1
0
0
1 0
o
C
5
2
o
C
5
@Nts:
oe
1 V =0V
.
GS
2 V =-0V
.
DS
4
3 2 0
µ
s P l e T s
. 5
us et
6
8
1
0
1
-1
0
1
-1
0
1
0
0
@Nts:
oe
1 2 0
µ
s P l e T s
. 5
us et
2 T = 2
o
C
.
C
5
1
1
0
- 5
o
C
5
1
-1
0
2
4
-V
DS
, Drain-Source Voltage [V]
-V
GS
, Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
5
Fig 4. Source-Drain Diode Forward Voltage
-I
DR
, Reverse Drain Current [A]
1
1
0
R
DS(on)
, [
Ω
]
Drain-Source On-Resistance
4
3
V =-0V
1
GS
1
0
0
1 0
o
C
5
2
o
C
5
@Nts:
oe
1 V =0V
.
GS
2 2 0
µ
s P l e T s
. 5
us et
20
.
25
.
30
.
35
.
40
.
2
1
V =-0V
2
GS
0
0
2
4
6
8
@ N t : T = 2
o
C
oe
J
5
1
0
1
2
1
4
1
-1
0
05
.
10
.
15
.
-I
D
, Drain Current [A]
-V
SD
, Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
50
0
C =C +C (C =sotd)
iss gs gd
ds
h r e
C =C +C
oss ds gd
C =C
rss gd
C
iss
30
0
Fig 6. Gate Charge vs. Gate-Source Voltage
-V
GS
, Gate-Source Voltage [V]
40
0
1
0
Capacitance [pF]
V =-0V
2
DS
V =-0V
5
DS
V =-0V
8
DS
20
0
C
oss
10
0
C
rss
@Nts:
oe
1 V =0V
.
GS
2 f=1Mz
.
H
5
@Nts:I =36A
oe
D
-.
0
0
2
4
6
8
1
0
0
0
1
0
1
1
0
-V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
SFM9110
Fig 7. Breakdown Voltage vs. Temperature
12
.
25
.
P-CHANNEL
POWER MOSFET
Fig 8. On-Resistance vs. Temperature
-BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
20
.
11
.
15
.
10
.
10
.
@Nts:
oe
1 V =-0V
.
GS
1
2 I =-. A
.
D
18
-0
5
-5
2
0
2
5
5
0
7
5
10
0
15
2
10
5
15
7
09
.
@Nts:
oe
1 V =0V
.
GS
2 I = - 5
µ
A
.
D
20
-0
5
-5
2
0
2
5
5
0
7
5
10
0
15
2
10
5
15
7
05
.
08
.
-5
7
00
.
-5
7
T
J
, Junction Temperature [
o
C]
T
J
, Junction Temperature [
o
C]
Fig 9. Max. Safe Operating Area
-I
D
, Drain Current [A]
1
2
0
Oeaini Ti Ae
prto n hs ra
i L m t d b R
DS(on)
s iie y
Fig 10. Max. Drain Current vs. Case Temperature
12
.
-I
D
, Drain Current [A]
1
2
0
1
1
0
00 m
.1 s
01m
. s
1m
s
1 m
0 s
@Nts:
oe
1 T = 2
o
C
.
C
5
2 T = 1 0
o
C
.
J
5
3 Snl Ple
. ige us
1
-2
0
1
0
0
1
1
0
D
C
09
.
1
0
0
06
.
1
-1
0
03
.
00
.
2
5
5
0
7
5
10
0
o
15
2
10
5
-V
DS
, Drain-Source Voltage [V]
T
c
, Case Temperature [ C]
Fig 11. Thermal Response
Thermal Response
10
2
D=0.5
10
1
0.2
0.1
0.05
@ Notes :
1. Z
θ
J C
(t)=50
o
C/W Max.
2. Duty Factor, D=t
1
/t
2
3. T
J M
-T
C
=P
D M
*Z
θ
J C
(t)
P
.
DM
t
1.
t
2.
Z
JC
(t) ,
0.02
10
0
0.01
single pulse
θ
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
10
0
10
1
t
1
, Square Wave Pulse Duration
[sec]
P-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SFM9110
“ Current Regulator ”
50K
Ω
12V
200nF
300nF
Same Type
as DUT
V
GS
Q
g
-10V
V
DS
V
GS
DUT
-3mA
Q
gs
Q
gd
R
1
Current Sampling (I
G
)
Resistor
R
2
Current Sampling (I
D
)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
R
L
V
out
V
in
R
G
DUT
-10V
V
out
90%
t
on
t
off
t
r
t
d(off)
t
f
V
DD
( 0.5 rated V
DS
)
t
d(on)
V
in
10%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
L
V
DS
Vary t
p
to obtain
required peak I
D
BV
DSS
1
E
AS
= ---- L
L
I
AS2
--------------------
2
BV
DSS
-- V
DD
t
p
I
D
V
DD
Time
V
DS
(t)
R
G
DUT
-10V
t
p
C
V
DD
I
AS
BV
DSS
I
D
(t)
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