5962F9862901VCC datasheet, PDF

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5962F9862901VCC: DescriptionAC SERIES, DUAL 4-INPUT AND GATE, CDIP, SIDE BRAZED, CERAMIC, DIP-14; Categorylogic logic; File Size37KB，2 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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5962F9862901VCC Overview

AC SERIES, DUAL 4-INPUT AND GATE, CDIP, SIDE BRAZED, CERAMIC, DIP-14

5962F9862901VCC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	not_compliant
Is Samacsys	N
series	AC
JESD-30 code	R-CDIP-T14
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND GATE
MaximumI(ol)	0.008 A
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Sup	15 ns
propagation delay (tpd)	15 ns
Certification status	Not Qualified
Schmitt trigger	NO
Filter level	MIL-PRF-38535 Class V
Maximum seat height	5.08 mm
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
total dose	300k Rad(Si) V
width	7.62 mm
Base Number Matches	1

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ACS21MS

Data Sheet

July 1999

File Number

4757

Radiation Hardened Dual 4-Input AND Gate

The Radiation Hardened ACS21MS is a Dual 4-Input AND

Gate. For each gate, a HIGH level on all inputs results in a

HIGH level on the Y output. A LOW level on any input

results in a LOW level on the Y output. All inputs are

buffered and the outputs are designed for balanced

propagation delay and transition times.

The ACS21MS is fabricated on a CMOS Silicon on

Sapphire (SOS) process, which provides an immunity to

Single Event Latch-up and the capability of highly reliable

performance in any radiation environment. These devices

offer significant power reduction and faster performance

when compared to ALSTTL types.

Speciﬁcations for Rad Hard QML devices are controlled

by the Defense Supply Center in Columbus (DSCC). The

SMD numbers listed below must be used when ordering.

Detailed Electrical Speciﬁcations for the ACS21MS are

contained in SMD 5962-98629. A “hot-link” is provided

on our homepage for downloading.

www.intersil.com/spacedefense/newsafclasst.asp

Features

• QML Qualiﬁed Per MIL-PRF-38535 Requirements

• 1.25 Micron Radiation Hardened SOS CMOS

• Radiation Environment

- Latch-Up Free Under Any Conditions

- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 10

RAD(Si)

- SEU Immunity . . . . . . . . . . . . . <1 x 10

-10

Errors/Bit/Day

- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm

)

• Input Logic Levels. . . . V

= (0.3)(V

), V

= (0.7)(V

)

• Output Current

. . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA

(Min)

• Quiescent Supply Current . . . . . . . . . . . . . . . 5.0µA (Max)

• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 15ns (Max)

Applications

• High Speed Control Circuits

• Sensor Monitoring

• Low Power Designs

Ordering Information

ORDERING NUMBER

5962F9862901VCC

ACS21D/SAMPLE-03

5962F9862901VXC

ACS21K/SAMPLE-03

5962F9862901V9A

INTERNAL MARKETING

NUMBER

ACS21DMSR-03

ACS21D/SAMPLE-03

ACS21KMSR-03

ACS21K/SAMPLE-03

ACS21HMSR-03

TEMP. RANGE (

-55 to 125

PACKAGE

14 Ld SBDIP

14 Ld Flatpack

Die

DESIGNATOR

CDIP2-T14

CDFP3-F14

Pinouts

ACS21MS

(SBDIP)

TOP VIEW

A1 1

B1 2

NC 3

C1 4

D1 5

Y1 6

GND 7

14 V

13 D2

12 C2

11 NC

10 B2

9 A2

8 Y2

ACS21MS

(FLATPACK)

TOP VIEW

GND

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

5962F9862901VCC Related Products

	5962F9862901VCC	5962F9862901V9A	5962F9862901VXC	ACS21D/SAMPLE-03	ACS21K/SAMPLE-03
Description	AC SERIES, DUAL 4-INPUT AND GATE, CDIP, SIDE BRAZED, CERAMIC, DIP-14	AC SERIES, DUAL 4-INPUT AND GATE, UUC, DIE-14	AC SERIES, DUAL 4-INPUT AND GATE, CDFP, CERAMIC, DFP-14	DUAL 4-INPUT AND GATE, CDIP14, SIDE BRAZED, DIP-14	DUAL 4-INPUT AND GATE, CDFP14, CERAMIC, DFP-14
Parts packaging code	DIP	DIE	DFP	DIP	DFP
package instruction	DIP, DIP14,.3	DIE,	DFP, FL14,.3	SIDE BRAZED, DIP-14	DFP,
Contacts	14	14	14	14	14
Reach Compliance Code	not_compliant	unknown	not_compliant	unknown	unknown
JESD-30 code	R-CDIP-T14	X-XUUC-N14	R-CDFP-F14	R-CDIP-T14	R-CDFP-F14
Logic integrated circuit type	AND GATE	AND GATE	AND GATE	AND GATE	AND GATE
Number of functions	2	2	2	2	2
Number of entries	4	4	4	4	4
Number of terminals	14	14	14	14	14
Package body material	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DIE	DFP	DIP	DFP
Package shape	RECTANGULAR	UNSPECIFIED	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	UNCASED CHIP	FLATPACK	IN-LINE	FLATPACK
propagation delay (tpd)	15 ns	15 ns	15 ns	15 ns	15 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	NO	YES	YES	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	THROUGH-HOLE	NO LEAD	FLAT	THROUGH-HOLE	FLAT
Terminal location	DUAL	UPPER	DUAL	DUAL	DUAL
series	AC	AC	AC	-	-
JESD-609 code	e0	e0	e0	-	-
Filter level	MIL-PRF-38535 Class V	MIL-PRF-38535 Class V	MIL-PRF-38535 Class V	-	-
Maximum seat height	5.08 mm	-	2.92 mm	5.08 mm	2.92 mm
Terminal surface	Tin/Lead (Sn/Pb)	TIN LEAD	Tin/Lead (Sn/Pb)	-	-
Terminal pitch	2.54 mm	-	1.27 mm	2.54 mm	1.27 mm
total dose	300k Rad(Si) V	300k Rad(Si) V	300k Rad(Si) V	-	-
width	7.62 mm	-	6.285 mm	7.62 mm	6.285 mm
Maker	-	-	Renesas Electronics Corporation	Renesas Electronics Corporation	Renesas Electronics Corporation

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