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MC10LVEL40DWR2G

Description
3.3/5V ECL Differential Phase−Frequency Detector
CategoryAnalog mixed-signal IC    The signal circuit   
File Size110KB,6 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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MC10LVEL40DWR2G Overview

3.3/5V ECL Differential Phase−Frequency Detector

MC10LVEL40DWR2G Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP20,.4
Contacts20
Reach Compliance Codecompli
Other featuresNECL MODE : VCC = 0V WITH VEE = -3V TO -5.5V
Analog Integrated Circuits - Other TypesPHASE DETECTOR
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length12.8 mm
Number of functions1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3/5 V
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width7.5 mm
Base Number Matches1
MC100LVEL40
3.3/5V ECL Differential
Phase−Frequency Detector
Description
The MC100LVEL40 is a three state phase frequency−detector
intended for phase−locked loop applications which require a minimum
amount of phase and frequency difference at lock. Advanced design
significantly reduces the dead zone of the detector. For proper
operation, the input edge rate of the R and V inputs should be less than
5 ns. The device is designed to work with a 3.3 V power supply.
When the reference (R) and the feedback (FB) inputs are unequal in
frequency and/or phase the differential up (U) and down (D) outputs
will provide pulse streams which when subtracted and integrated
provide an error voltage for control of a VCO.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
For application information, refer to AND8040/D, “Phase Lock
Loop Operation.”
The 100 Series Contains Temperature Compensation
Features
http://onsemi.com
MARKING
DIAGRAM
20
20
1
SO−20
DW SUFFIX
CASE 751D
100LVEL40
AWLYYWWG
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
250 MHz Typical Bandwidth
PECL Mode Operating Range:
*For additional marking information, refer to
Application Note AND8002/D.
V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
=
−3.0
V to
−5.5
V
Internal Input Pulldown Resistor
Pb−Free Packages are Available*
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
November, 2006
Rev. 8
1
Publication Order Number:
MC100LVEL40/D

MC10LVEL40DWR2G Related Products

MC10LVEL40DWR2G MC100LVEL40 MC100LVEL40_06 MC10LVEL40DWG MC10LVEL40DW MC10LVEL40DWR2
Description 3.3/5V ECL Differential Phase−Frequency Detector 3.3/5V ECL Differential Phase−Frequency Detector 3.3/5V ECL Differential Phase−Frequency Detector 3.3/5V ECL Differential Phase−Frequency Detector 3.3/5V ECL Differential Phase−Frequency Detector 3.3/5V ECL Differential Phase−Frequency Detector
Is it lead-free? Lead free - - Lead free Contains lead Contains lead
Is it Rohs certified? conform to - - conform to incompatible incompatible
Parts packaging code SOIC - - SOIC SOIC SOIC
package instruction SOP, SOP20,.4 - - SOP, SOP20,.4 SOP, SOP20,.4 SOP, SOP20,.4
Contacts 20 - - 20 20 20
Reach Compliance Code compli - - compli _compli _compli
Other features NECL MODE : VCC = 0V WITH VEE = -3V TO -5.5V - - NECL MODE : VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE : VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE : VCC = 0V WITH VEE = -3V TO -5.5V
Analog Integrated Circuits - Other Types PHASE DETECTOR - - PHASE DETECTOR PHASE DETECTOR PHASE DETECTOR
JESD-30 code R-PDSO-G20 - - R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e3 - - e3 e0 e0
length 12.8 mm - - 12.8 mm 12.8 mm 12.8 mm
Number of functions 1 - - 1 1 1
Number of terminals 20 - - 20 20 20
Maximum operating temperature 85 °C - - 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C - - -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP - - SOP SOP SOP
Encapsulate equivalent code SOP20,.4 - - SOP20,.4 SOP20,.4 SOP20,.4
Package shape RECTANGULAR - - RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE - - SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 - - 260 225 225
power supply 3.3/5 V - - 3.3/5 V 3.3/5 V 3.3/5 V
Certification status Not Qualified - - Not Qualified Not Qualified Not Qualified
Maximum seat height 2.65 mm - - 2.65 mm 2.65 mm 2.65 mm
Maximum supply voltage (Vsup) 5.5 V - - 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 3 V - - 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V - - 3.3 V 3.3 V 3.3 V
surface mount YES - - YES YES YES
Temperature level INDUSTRIAL - - INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface MATTE TIN - - MATTE TIN TIN LEAD TIN LEAD
Terminal form GULL WING - - GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm - - 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL - - DUAL DUAL DUAL
Maximum time at peak reflow temperature 40 - - 40 30 30
width 7.5 mm - - 7.5 mm 7.5 mm 7.5 mm
Base Number Matches 1 - - 1 1 1
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