FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12546-1E
8-bit Original Microcontroller
CMOS
F
2
MC-8L MB89530H Series
MB89537H/537HC/538H/538HC/
MB89P538/PV530
s
DESCRIPTION
The MB89530H series is a one-chip microcontroller featuring the F
2
MC-8L core supporting low-voltage and high-
speed operation. Built-in peripheral functions include timers, serial interface, A/D converter, and external interrupt.
This product is an ideal general-purpose one-chip microcontroller for a wide variety of applications from household
to industrial equipment, as well as use in portable devices.
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FEATURES
• Wide range of package options
•
Two types of QFP packages (1 mm pitch, 0.65 mm pitch)
•
LQFP package (0.5 mm pitch)
•
SH-DIP package
• Low voltage, high-speed operating capability
•
Minimum instruction execution time 0.32
µs
(at base oscillator 12.5 MHz)
• F
2
MC-8L CPU Core
•
Instruction set optimized for controller operation
•
Multiplication/division instructions
•
16-bit calculation
•
Branching instructions with bit testing
•
Bit operation instructions, etc.
• Five timer systems
•
8-bit PWM timer with 2 channels (usable as either interval timer of PWM timer)
•
Pulse width count timer (supports continuous measurement or remote control receiving applications)
•
16-bit timer counter
•
21-bit time base timer
•
Clock prescaler (17-bit)
•
UART
•
Synchronous or asynchronous operation, switchable
• 2 serial interfaces (Serial I/O)
•
Selection of transfer direction (specify MSB first or LSB first) for communication with a variety of devices
(Continued)
MB89530H Series
(Continued)
• 10-bit A/D converter (8 channels)
•
External clock input and time base timer output for startup support
• Pulse generators (PPG) with 2-program capability
•
6-bit PPG with selection of pulse width and pulse period
•
12-bit PPG (2 channels) with selection of pulse width and pulse period
• I
2
C interface circuits
• External interrupt 1 (4 channels)
•
4 independent inputs, release enabled from standby mode (includes edge detection function)
• External interrupt 2 (8 channels)
•
8 independent inputs, release enabled form standby mode (includes level edge detection function)
• Standby modes (low power consumption modes)
•
Stop mode (oscillator stops, virtually no power consumed)
•
Sleep mode (CPU stops, power consumption reduced to one-third)
•
Sub clock mode
•
Clock mode
• Watchdog timer reset
• I/O ports
•
Maximum 53 ports
•
38 general-purpose I/O ports (CMOS)
•
2 general-purpose I/O ports (N-ch open drain)
•
8 general-purpose output ports (N-ch open drain)
•
5 general-purpose input ports (CMOS)
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PACKAGES
64-pin, Plastic SH-DIP
64-pin, Plastic LQFP
64-pin, Plastic QFP
(DIP-64P-M01)
64-pin, Plastic QFP
(FPT-64P-M03)
64-pin, Ceramic MDIP
(FPT-64P-M06)
64-pin, Ceramic MQFP
(FPT-64P-M09)
(MDP-64C-P02)
(MQP-64C-P01)
2
MB89530H Series
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PRODUCT LINEUP
Part number
MB89537H/537HC
Parameter
Type
MB89538H/538HC
MB89P538
One-time
programmable
48 K
×
8-bit
(built-in ROM)
(write from general
purpose ERPOM writer)
2 K
×
8-bit
2.7 V to 5.5 V
MB89PV530
Evaluation
48 K
×
8-bit
(external ROM) *
2
Mass produced (Mask ROM)
32 K
×
8-bit
(built-in ROM)
1 K
×
8-bit
3.5 V to 5.5 V*
1
(MB89537H/538H/537HC/538HC)
Basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Minimum interrupt processing time
48 K
×
8-bit
(built-in ROM)
ROM capacity
RAM capacity
Operating voltage
CPU functions
: 136
: 8-bits
: 1 bit to 3 bits
: 1, 8, 16-bits
: 0.32
µs /
12.5 MHz
: 2.88
µs /
12.5 MHz
Ports
Peripheral functions
Input ports
: 5 (4 also usable as interrupts, 2 for sub clock)
Output-only ports (N-ch open drain)
: 8 (8 also usable as ADC input)
I/O ports (N-ch open drain) : 2 (2 also usable as SO2/SDA or SI2/SCL)
I/O ports (CMOS)
: 38 (21 have no other function)
Total
: 53
21 bits
Interrupt periods at main clock oscillation frequency of 12.5 MHz
(approx. 0.655 ms, 2.621 ms, 20.97 ms, 335.5 ms)
Reset period of approx. 167.8 ms to 335.6 ms at mail clock frequency of 12.5 MHz
Reset period of approx. 500 ms to 1000 ms at sub clock frequency of 32.768 kHz.
8-bit interval timer operation*
3
(supports square wave output, operating clock period : 1, 8, 16, 64 t
inst
*
3
)
Pulse width measurement with 8-bit resolution (conversion period : 2
8
t
inst
*
3
to 2
8
×
64 t
inst
*
3
)
2 channels (can also be used as interval timer, can also be used as ch1 output and ch2
count clock)
Interval times at 17-bit sub clock base frequency of 32.768 kHz
(approx. 31.25 ms, 0.25 s, 0.50 s, 1.00 s, 2.00 s, 4.00 s)
Time base timer
Watchdog timer
PWM timer
Clock prescaler
(Continued)
3
MB89530H Series
(Continued)
Part number
Parameter
MB89537H/537HC
MB89538H/538HC
MB89P538
MB89PV530
Pulse width count
timer
8-bit one-shot timer operation
(supports underflow output, operating clock period : 1, 4, 32 t
inst
*
3
, external)
8-bit reload timer operation
(supports square wave output, operating clock period : 1, 4, 32 t
inst
*
3
, external)
8-bit pulse width measurement operation
(continuous measurement, H width measurement, L width measurement,
↑
to
↑, ↓
to
↓,
H width measurement and
↑
to↑)
16-bit timer operation (operating clock period : 1 t
inst
*
3
, external)
16-bit event counter operation (select rising, falling, or both edges)
16-bit
×
1 ch
8 bit length
Selection of LSB first or MSB first
Transfer clock (2, 8, 32 t
inst
*
3
, external)
CLK synchronous/CLK asynchronous data transfer capability (8, 9 bit with parity bit, or 7,8
bit without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
CLK synchronous/CLK asynchronous data transfer capability (4, 6, 7, 8 bit with parity bit,
or 5, 7, 8, 9 bit without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
External clock input, 2-channel 8-bit PWM timer output also available for baud rate
settings.
16-bit timer/
counter
Serial I/O
Peripheral functions
UART/SIO
UART
4-channel independent.
External interrupt 1 Selection of rising, falling, or both edge detection.
Can be used for recovery from standby mode (edge detection also available in stop mode)
External interrupt 2
6-bit PPG,
12-bit PPG
I
2
C bus interface
8-channel independent L level detection.
Can be used for recovery from standby mode.
Can generate square wave signals with programmable period.
6-bit
×
1 channel or 12-bit
×
2 channels.
1-channel , compatible with Intel System Administrator bus version 1.0 and Philips I
2
C
specifications.
2-line communications (on MB89PV530/P538/537HC/538HC)
10-bit resolution
×
8 channels.
A/D conversion functions (conversion time : 60 t
inst
*
3
)
Supports repeated calls from external clock or internal clock.
Standard voltage input provided (AVR)
A/D converter
Standby modes
Sleep mode, stop mode, sub clock mode, clock mode.
(power saving modes)
Process
CMOS
*1 : Depends on operating frequency.
*2 : Using external ROM and MBM27C512.
*3 : t
inst
represents instruction execution time. This can be selected as 1/4, 1/8, 1/16, 1/64 of the main clock cycle
or 1/2 of the sub clock cycle.
Note : MB89537H/538H have no built-in I
2
C functions.
To use I
2
C functions, choose the MB89PV530/MB89P538/537HC/538HC.
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MB89530H Series
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MODEL DIFFERENCES AND SELECTION CONSIDERATIONS
Part number
Package
DIP-64P-M01
FPT-64P-M03
FPT-64P-M06
FPT-64P-M09
MDP-64C-P02
MQP-64C-P01
MB89537H/537HC MB89538H/538HC
O
O
O
O
X
X
O
O
O
O
X
X
MB89P538
O
X
O
O
X
X
MB89PV530
X
X
X
X
O
O
O : Model-package combination available
X : Model-package combination not available
Conversion sockets for pin pitch conversion (manufactured by Sunhayato) can be used.
Contact : Sunhayato TEL +81-3-3984-7791 (Tokyo)
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DIFFERENCES AMONG PRODUCTS
1. Memory Capacity
When this product is used in a piggy-back or other evaluation configuration, it is necessary to carefully confirm
the differences between the model being used and the product it is evaluating. Particular attention should be
given to the following (see “ CPU CORE 1.Memory Space”) .
• The program ROM area starts from address 4000
H
on the MB89P538 and MB89PV530 models.
• Note upper limits on RAM, such as stack areas, etc.
2. Current Consumption
• On the MB89PV530, the additional current consumed by the EPROM is added at the connecting socket on
the back side.
• When operating at low speed, the current consumption in the one-time PROM or EPROM models is greater
than on the mask ROM models. However, current consumption in sleep or stop modes is identical.
For details, refer to “ ELECTRICAL CHARACTERISTICS”.
3. Mask Options
The options available for use, and the method of specifying options, differ according to the model. Before use,
check the “ MASK OPTIONS” specification section.
4. Wild Register Functions
The following table shows areas in which wild register functions can be used.
Wild Register Usage Areas
Part number
Address space
MB89PV530
MB89P538
MB89537H/537HC
MB89538H/538HC
4000
H
to FFFF
H
4000
H
to FFFF
H
8000
H
to FFFF
H
4000
H
to FFFF
H
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