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UPD45128163G5-A75I-9JF-E

Description
Synchronous DRAM, 8MX16, 5.4ns, MOS, PDSO54, ROHS COMPLIANT, PLASTIC, TSOP2-54
Categorystorage    storage   
File Size929KB,86 Pages
ManufacturerELPIDA
Websitehttp://www.elpida.com/en
Environmental Compliance
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UPD45128163G5-A75I-9JF-E Overview

Synchronous DRAM, 8MX16, 5.4ns, MOS, PDSO54, ROHS COMPLIANT, PLASTIC, TSOP2-54

UPD45128163G5-A75I-9JF-E Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Parts packaging codeTSOP2
package instructionTSOP2, TSOP54,.46,32
Contacts54
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time5.4 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G54
length22.22 mm
memory density134217728 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width16
Number of functions1
Number of ports1
Number of terminals54
word count8388608 words
character code8000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize8MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP54,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
refresh cycle4096
Maximum seat height1.2 mm
self refreshYES
Continuous burst length1,2,4,8,FP
Maximum standby current0.001 A
Maximum slew rate0.24 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
Base Number Matches1
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD45128163-I-E
128M-bit Synchronous DRAM
4-bank, LVTTL
WTR (Wide Temperature Range)
Description
The
µ
PD45128163 is high-speed 134,217,728-bit synchronous dynamic random-access memory, organized as
2,097,152
×
16
×
4 (word
×
bit
×
bank).
The synchronous DRAM achieved high-speed data transfer using the pipeline architecture.
All inputs and outputs are synchronized with the positive edge of the clock.
The synchronous DRAM is compatible with Low Voltage TTL (LVTTL).
This product is packaged in 54-pin TSOP (II).
Features
Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
Pulsed interface
Possible to assert random column address in every cycle
Quad internal banks controlled by BA0(A13) and BA1(A12)
Byte control by LDQM and UDQM
Programmable Wrap sequence (Sequential / Interleave)
Programmable burst length (1, 2, 4, 8 and full page)
Programmable /CAS latency (2 and 3)
Ambient temperature (T
A
):
−40
to + 85°C
Automatic precharge and controlled precharge
CBR (Auto) refresh and self refresh
• ×16
organization
Single 3.3 V
±
0.3 V power supply
LVTTL compatible inputs and outputs
4,096 refresh cycles / 64 ms
Burst termination by Burst stop command and Precharge command
TSOP (II) package with lead free solder (Sn-Bi)
RoHS compliant
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for
availability and additional information.
Document No. E0729N10 (Ver.1.0)
Date Published June 2005 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida
Memory, Inc. 2005
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

UPD45128163G5-A75I-9JF-E Related Products

UPD45128163G5-A75I-9JF-E UPD45128163G5-A75LI-9JF-E
Description Synchronous DRAM, 8MX16, 5.4ns, MOS, PDSO54, ROHS COMPLIANT, PLASTIC, TSOP2-54 Synchronous DRAM, 8MX16, 5.4ns, MOS, PDSO54, ROHS COMPLIANT, PLASTIC, TSOP2-54
Is it Rohs certified? conform to conform to
Parts packaging code TSOP2 TSOP2
package instruction TSOP2, TSOP54,.46,32 TSOP2, TSOP54,.46,32
Contacts 54 54
Reach Compliance Code unknown unknown
ECCN code EAR99 EAR99
access mode FOUR BANK PAGE BURST FOUR BANK PAGE BURST
Maximum access time 5.4 ns 5.4 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 133 MHz 133 MHz
I/O type COMMON COMMON
interleaved burst length 1,2,4,8 1,2,4,8
JESD-30 code R-PDSO-G54 R-PDSO-G54
length 22.22 mm 22.22 mm
memory density 134217728 bit 134217728 bit
Memory IC Type SYNCHRONOUS DRAM SYNCHRONOUS DRAM
memory width 16 16
Number of functions 1 1
Number of ports 1 1
Number of terminals 54 54
word count 8388608 words 8388608 words
character code 8000000 8000000
Operating mode SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
organize 8MX16 8MX16
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 TSOP2
Encapsulate equivalent code TSOP54,.46,32 TSOP54,.46,32
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3 V 3.3 V
Certification status Not Qualified Not Qualified
refresh cycle 4096 4096
Maximum seat height 1.2 mm 1.2 mm
self refresh YES YES
Continuous burst length 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current 0.001 A 0.001 A
Maximum slew rate 0.24 mA 0.24 mA
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology MOS MOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 10.16 mm 10.16 mm
Base Number Matches 1 1
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