Value Series Flash Card
FVA Value Series
Value Series Flash Memory Card
2, 4, 8, 16 MEGABYTE (Intel/Sharp based )
The WEDC Value Series (FV) Flash memory cards
offers a low cost linear Flash solid state storage
solution for code and data storage, high performance
disk emulation, mobile PC and embedded
applications.
The WEDC Value series is based on Intel/Sharp Flash
memories. Cards are based on the 28F008SA (8Mb),
28F008S5 (8Mb) or 28F016S5 (16Mb) devices whose
device codes are A2H, A6H and AAH respectively.
Systems should be able to recognize all three codes.
The symmetrically blocked architecture and single 5V
operation provides a cost effective, high performance,
nonvolatile storage solution. The PC Card form factor
offers an industry standard pinout and mechanical
outline, allowing density upgrades without system
design changes.
The Value series is designed as a simple x16 linear
array of Flash devices. Two Flash devices in parallel
provide the lower and upper bytes for the 16 bit
access. The Value series does not provide access of
the ODD byte (D8 - D15) on the even byte data path
(D0 - D7).
WEDC’s standard Value Series Flash Card is shipped
with no attribute memory or CIS (Card Information
Structure) information. An option for 2KB of attribute
memory with CIS information is available. The CIS
for the WEDC Value series may also be stored in
Block 0 (even bytes, D0 - D7 only) of the Flash
memory, this option is available by request only.
WEDC’s standard cards are shipped with WEDC’s
Logo. Cards are also available with blank housings
(no Logo). The blank housings are available in both a
recessed (for label) and flat housing. Please contact
WEDC sales representative for further information on
Custom artwork.
FEATURES
•
Low cost Linear Flash Card
•
Single 5 Volt Supply
•Based
on FlashFile
TM
Components
•Fast
Read Performance
- 100ns or 150ns Maximum Access Time
•
x16 Data Interface
- Odd byte not accessible on Even byte
•
High Performance Random Writes
- 10µs Typical Word Write Time
•
Automated Write and Erase Algorithms
- Intel Command Set
•
50µA Typical Deep Power-Down
•
100,000 Erase Cycles per Block
•
64K word symmetrical Block Architecture
•
PC Card Standard Type I Form Factor
Block Diagram
Busy 0-7
Device 7
Device 6
Device 5
RDY/BSY
/WR
/RD
CONTROL
LOGIC
Device 4
/CE1
/CE2
/REG
/WE
/OE
Device 3
Device 2
Device 1
Device 0
ATTRIBUTE
MEMORY
ADDRESS BUS A1-A20
28C16
A21
A22
Vcc
Vcc
Vpp
Generator
Vpp
DATA
D8-15
Vpp1
Vpp2
VS1
VS2
DATA
D0-7
open
Note: VPP Generator only required for cards using 28F008SA devices
Configuration above for 8MB card using 8Mbit components
July 28, 1999
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
1
FVA Series
Pinout
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
A8
A13
A14
WE#
RDY/BSY#
Vcc
Vpp1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal name
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
RFU
RFU
A17
A18
A19
A20
A21
Vcc
Vpp2
A22
A23
A24
A25
VS2
RST
Wait#
RFU
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
I/O
O
I/O
I/O
I/O
I/O
I
I
O
Function
Active
Ground
Card Detect 1
LOW
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
LOW
Voltage Sense 1
N.C.
Reserved
Reserved
Address bit 17
Address bit 18
Address bit 19
Address bit 20
2MB(2)
Address bit 21
4MB(2)
Supply Voltage
Prog. Voltage
N.C.
Address bit 22
8MB(2)
Address bit 23 16MB(2)
Address bit 24
N.C.
Address bit 25
N.C.
Voltage Sense 2
N.C.
Card Reset
HIGH
Extended Bus cycle LOW
Reserved
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
LOW
Ground
LOW
LOW
LOW
LOW
N.C.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I
I
I
I
O
I
O
I
O
O
I/O
I/O
O
O
N.C.
HIGH
Notes:
1) RDY/BSY signal is a full CMOS output, pull-up resistors are not required
2) Shows density for which specified address bit is MSB. Higher order address bits are no connects (ie 4MB A21 is MSB A22 - A25 are NC).
Mechanical
1.0mm
±
(0.039”) 0.05
1.6mm
±
0.05
(0.063”)
Interconnect area
10.0mm MIN
(0.400”)
3.0mm MIN
Substrate area
54.0mm
±
0.10
(2.126”)
1.0mm
±
0.05
(0.039”)
10.0mm MIN
(0.400”)
85.6mm
±
0.20
(3.370”)
3.3mm
±
T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
July 28, 1999
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
2
FVA Series
Card Signal Description
Symbol
A0 - A25
Type
INPUT
Name and Function
ADDRESS INPUTS:
A0 through A25 enable direct addressing of
up to 64MB of memory on the card. Signal A0 is not decoded since
the card is x16 only. The memory will wrap at the card density
boundary. The system should not try to access memory beyond the
card density. The upper addresses are not connected.
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the
bi-directional databus. DQ0 - DQ7 constitute the lower (even) byte
and DQ8 - DQ15 the upper (odd) byte. DQ15 is the MSB.
CARD ENABLE 1 AND 2:
CE1# enables even byte accesses, CE2#
enables odd byte accesses. Odd byte (DQ8 - DQ15) can not be
accessed on DQ0 - DQ7.
OUTPUT ENABLE:
Active low signal enabling read data from the
memory card.
WRITE ENABLE:
Active low signal gating write data to the
memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase
or program algorithms. A high output indicates that the card is ready
to accept accesses.
CARD DETECT 1 and 2:
Provide card insertion detection. These
signals are connected to ground internally on the memory card. The
host socket interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
WRITE PROTECT:
This signal is pulled low internally. This
signifies write protect = "off " for all cases.
PROGRAM/ERASE POWER SUPPLY:
Not connected for 5V
only card.
CARD POWER SUPPLY:
5.0V for all internal circuitry.
GROUND:
for all internal circuitry.
ATTRIBUTE MEMORY SELECT :
only used with cards built
with optional attribute memory.
RESET:
Active high signal for placing card in Power-on default
state. Reset can be used as a Power-Down signal for the memory
array.
WAIT:
This signal is pulled high internally for compatibility. No
wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to
maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V, 16 bit card
has been inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven
or left floating
Common Memory
Attribute Memory
DQ0 - DQ15
INPUT/OUTP
UT
INPUT
CE1#, CE2#
OE#
WE#
RDY/BSY#
INPUT
INPUT
OUTPUT
CD1#, CD2#
OUTPUT
WP
VPP1, VPP2
VCC
GND
REG#
RST
OUTPUT
N.C.
INPUT
INPUT
WAIT#
BVD1, BVD2
VS1, VS2
OUTPUT
OUTPUT
OUTPUT
RFU
N.C.
Functional Truth Table
READ function
Function Mode
Standby Mode
Low Byte Access
Word Access (16 bits)
Odd-Byte Only Access
WRITE function
/CE2 /CE1
H
H
H
L
L
L
L
H
H
H
L
L
H
L
L
H
/OE
X
L
L
L
X
H
H
H
/WE
X
H
H
H
X
L
L
L
/REG D15-D8
D7-D0
X
High-Z
High-Z
H
High-Z Even-Byte
H
Odd-Byte Even-Byte
H
Odd-Byte
High-Z
X
H
H
H
X
X
Even-Byte
X
Odd-Byte Even-Byte
Odd-Byte
X
/REG D15-D8
X
High-Z
L
High-Z
L
Not Valid
L
Not Valid
X
L
L
L
X
X
X
X
D7-D0
High-Z
Even-Byte
Even-Byte
High-Z
X
Even-Byte
Even-Byte
X
Standby Mode
Low Byte Access
Word Access (16 bits)
Odd-Byte Only Access
July 28, 1999
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
3
FVA Series
Absolute Maximum Ratings (2)
Operating Temperature TA (ambient)
Commercial
Industrial
Storage Temperature
Voltage on any pin relative to VSS
VCC supply Voltage relative to VSS
0°C to +60 °C
-40°C to +85 °C
-55°C to +110 °C
-0.5V to VCC+0.5V (1)
-0.5V to +7.0V
Notes:
(1) During transitions, inputs may undershoot to -2.0V or overshoot to VCC +2.0V for periods less
than 20ns.
(2) Stress greater than those listed under “Absolute Maximum ratings” may cause permanent
damage to the device. This is a stress rating only and functional operation at these or any other
conditions greater than those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
DC Characteristics
(1)
Symbol
ICCR
ICCW
ICCE
ICCSL
Parameter
VCC Read Current
VCC Program Current
VCC Erase Current
VCC Sleep Current
Density
(Mbytes)
2,4,8,16
2,4,8,16
2,4,8,16
2,4,8
2
50
Notes
Typ
(3)
Max
75
100
100
160
Units
mA
mA
mA
µA
Test Conditions
VCC = 5.25V
tcycle = 100ns
ICCSL
VCC Sleep Current
16
2
90
240
µA
ICCS
VCC Standby Current
2,4,8,16
2
3
10
mA
VCC = 5.25V
Control Signals = VCC
Reset = VIH
VCC = 5.25V
Control Signals = VCC
Reset = VIH
VCC = 5.25V
Control Signals = VCC
CMOS Test Conditions: VIL = VSS ± 0.2V, VIH = VCC ± 0.2V
Notes:
1. All currents are for x16 mode and are RMS values unless otherwise specified.
2. Control Signals: CE
1
#, CE
2
#, OE#, WE#, REG#
3. Typical: VCC = 5V, T = +25C
Symbol
ILI
ILO
VIL
VIH
VOL
VOH
VLKO
Parameter
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
VCC Erase/Program
Lock Voltage
Notes
1,2
1
1
1
1
1
1
VCC-0.4
2.0
0
3.85
Min
Max
±20
±20
0.8
VCC+0.5
0.4
VCC
Units
µA
µA
V
V
V
V
V
IOL = 3.2mA
IOH = -2.0mA
Test Conditions
VCC = VCCMAX
Vin =VCC or VSS
VCC = VCCMAX
Vout =VCC or VSS
Notes:
1) Values are the same for byte and word wide modes for all card densities.
2) Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND due to
internal pull-up resistors. Leakage currents on RST will be <150µA when VIN=VCC due to internal pull-down resistor
July 28, 1999
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
4
FVA Series
AC Characteristics
Read Timing Parameters (1)
100ns (2)
SYMBOL
(PCMCIA)
t
RC
t
a
(A)
t
a
(CE)
t
a
(OE)
t
su
(A)
t
su
(CE)
t
h
(A)
t
h
(CE)
t
v
(A)
t
dis
(CE)
t
dis
(OE)
t
dis
(CE)
t
dis
(CE)
trec(RST)
Parameter
Read Cycle Time
Address Access Time
Card Enable Access Time
Output Enable Access Time
Address Setup Time
Card Enable Setup Time
Address Hold Time
Card Enable Hold Time
Output Hold from Address Change
Output Disable Time from CE#
Output Disable Time from OE#
Output Enable Time from CE#
Output Enable Time from OE#
Power Down recovery to Output
Delay. VCC = 5V
5
5
500
Min
100
100
100
50
10
0
15
15
0
50
50
5
5
500
Max
150ns
Min
150
150
150
75
20
0
20
20
0
75
75
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications
2. Valid for cards using 8Mb components (28F008SA or 28F008S5)only. Cards based on 16Mb (28F016)
are available as 150ns cards only.
Read Timing Diagram
tc(R)
ta(A)
th(A)
A[25::0], /REG
tv(A)
ta(CE)
/CE1, /CE2
NOTE 1
tsu(CE)
NOTE 1
tsu(A)
ta(OE)
th(CE)
/OE
tdis(OE)
ten(OE)
D [15::0]
DATA VALID
tdis(CE)
Note 1: Signal may be high or low in this area
July 28, 1999
PC Card Products
White Electronic Designs
One Research Drive Westborough, MA 01581
http://www.whiteedc.com
5
FVA Series
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