74HC4052D/T3 datasheet, PDF - EEWORLD Datasheet

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74HC4052D/T3: DescriptionIC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, 3.90 MM, MS-012AC, SOT-109-1, PLASTIC, SOP-16, Multiplexer or Switch; CategoryAnalog mixed-signal IC The signal circuit; File Size162KB，26 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74HC4052D/T3 Overview

IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, 3.90 MM, MS-012AC, SOT-109-1, PLASTIC, SOP-16, Multiplexer or Switch

74HC4052D/T3 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	SOP,
Contacts	16
Reach Compliance Code	unknown
Analog Integrated Circuits - Other Types	DIFFERENTIAL MULTIPLEXER
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	9.9 mm
Humidity sensitivity level	1
Maximum negative supply voltage (Vsup)	-5 V
Negative supply voltage minimum (Vsup)	-1 V
Nominal Negative Supply Voltage (Vsup)	-4.5 V
Number of channels	4
Number of functions	1
Number of terminals	16
Nominal off-state isolation	50 dB
On-state resistance matching specifications	6 Ω
Maximum on-state resistance (Ron)	195 Ω
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5 V
Minimum supply voltage (Vsup)	1 V
Nominal supply voltage (Vsup)	4.5 V
surface mount	YES
Maximum disconnect time	57 ns
Maximum connection time	69 ns
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
Base Number Matches	1

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74HC4052; 74HCT4052

Dual 4-channel analog multiplexer/demultiplexer

Rev. 05 — 5 May 2008

Product data sheet

1. General description

The 74HC4052; 74HCT4052 is a high-speed Si-gate CMOS device and is pin compatible

with the HEF4052B. The device is speciﬁed in compliance with JEDEC standard no. 7A.

The 74HC4052; 74HCT4052 is a dual 4-channel analog multiplexer/demultiplexer with

common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to

nY3) and a common input/output (pin nZ). The common channel select logics include two

digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When

pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0

and S1. When pin E = HIGH, all switches are in the high-impedance OFF-state,

independent of pins S0 and S1.

and GND are the supply voltage pins for the digital control inputs (pins S0, S1 and E).

The V

to GND ranges are 2.0 V to 10.0 V for the 74HC4052 and 4.5 V to 5.5 V for the

74HCT4052. The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing between V

as a positive limit and V

as a negative limit. V

−

may not exceed 10.0 V.

For operation as a digital multiplexer/demultiplexer, V

is connected to GND (typically

ground).

2. Features

Wide analog input voltage range from

−5

V to +5 V

Low ON resistance:

Ω

(typical) at V

−

= 4.5 V

Ω

(typical) at V

−

= 6.0 V

Ω

(typical) at V

−

= 9.0 V

Logic level translation: to enable 5 V logic to communicate with

±5

V analog signals

Typical ‘break before make’ built-in

Complies with JEDEC standard no. 7A

ElectroStatic Discharge (ESD) protection:

Human Body Model (HBM) EIA/JESD22-A114E exceeds 2000 V

Machine Model (MM) EIA/JESD22-A115-A exceeds 200 V

Speciﬁed from

−40 °C

to +85

°C

and

−40 °C

to +125

°C

3. Applications

Analog multiplexing and demultiplexing

Digital multiplexing and demultiplexing

Signal gating

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