ICS873991AY-147LF datasheet, PDF

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ICS873991AY-147LF: DescriptionLow Skew Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52; Categorylogic logic; File Size304KB，20 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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ICS873991AY-147LF Overview

Low Skew Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52

ICS873991AY-147LF Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	QFP
package instruction	10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52
Contacts	52
Reach Compliance Code	compliant
ECCN code	EAR99
series	873991
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52
JESD-609 code	e3
length	10 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	52
Actual output times	13
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	10 mm
Base Number Matches	1

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LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL

CLOCK GENERATOR

ICS873991-147

ENERAL

ESCRIPTION

The ICS873991-147 is a low voltage, low skew, 3.3V

LVPECL or ECL Clock Generator and a member of

HiPerClockS™

the HiPerClockS™ family of High Performance

Clock Solutions from IDT. The ICS873991-147 has

two selectable clock inputs. The CLK, nCLK pair

can accept LVPECL, LVDS, LVHSTL, SSTL and HCSL input

levels and, the REF_CLK pin can accept a LVCMOS or LVTTL

input levels. This device has a fully integrated PLL along with

frequency configurable outputs. An external feedback input and

output regenerates clocks with “zero delay”.

EATURES

•

Fourteen differential 3.3V LVPECL/ECL outputs

•

Selectable differential or REF_CLK inputs

•

CLK, nCLK can accept the following input levels:

LVPECL, LVDS, LVHSTL, SSTL, HCSL

•

REF_CLK accepts the following input levels: LVCMOS, LVTTL

•

Input clock frequency range: 6.25MHz to 120MHz

•

Maximum output frequency: 480MHz

•

VCO range: 200MHz to 960MHz

•

Output skew: 250ps (maximum), outputs at the same frequency

•

Cycle-to-cycle jitter: 55ps (maximum)

•

LVPECL mode operating voltage supply range:

= 3.135V to 3.465V, V

= 0V

•

ECL mode operating voltage supply range:

= 0V, V

= -3.465V to -3.135V

•

0°C to 50°C ambient operating temperature

•

Available in lead-free (RoHS 6) package

The four independent banks of outputs each have their own

output dividers, which allow the device to generate a multitude

of different bank frequency ratios and output-to-input frequency

ratios. The output frequency range is 25MHz to 480MHz and

the input frequency range is 6.25MHz to 120MHz. The PLL_EN

input can be used to bypass the PLL for test and system debug

purposes. In bypass mode, the input clock is routed around the

PLL and into the internal output dividers.

The ICS873991-147 also has a SYNC output which can be

used for system synchronization purposes. It monitors Bank A

and Bank C outputs for coincident rising edges and signals a

pulse per the timing diagrams in this data sheet. This feature is

used primarily in applications where Bank A and Bank C are

running at different frequencies, and is particularly useful when

they are running at non-integer multiples of each other.

Example Applications:

1. Line Card Multiplier: Multiply 19.44MHz from a back-plane

to 77.76MHz on the line card ASIC and Serdes.

2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies

from a reference clock to multiple processing units on an

embedded system.

SSIGNMENT

FSEL0

FSEL1

FSEL2

nQB3

QB3

CCO

nQA0

QA0

nQA1

QA1

nQA2

QA2

nQA3

QA3

SYNC_SEL

VCO_SEL

39 38 37 36 35 34 33 32 31 30 29 28 27

FSEL3

nQC2

nQB2

nQB1

nQB0

CCO

QC2

QB2

QB1

QB0

QC1

nQC1

QC0

nQC0

CCO

QD1

nQD1

QD0

nQD0

CCO

QFB

nQFB

CCA

ICS873991-147

52-Lead LQFP

10mm x 10mm x 1.4mm

package body

Y package

Top View

2 3

PLL_EN

4 5 6

REF_SEL

FSEL_FB2

FSEL_FB1

7 8 9 10 11 12 13

FSEL_FB0

REF_CLK

nEXT_FB

EXT_FB

CLK

nCLK

IDT

™

/ ICS

™

LVPECL/ECL CLOCK GENERATOR

ICS873991AY-147 REV. B MARCH 31, 2009

ICS873991AY-147LF Related Products

	ICS873991AY-147LF	ICS873991AY-147LFT
Description	Low Skew Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52	Low Skew Clock Driver, 873991 Series, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Parts packaging code	QFP	QFP
package instruction	10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52	10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52
Contacts	52	52
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
series	873991	873991
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52	S-PQFP-G52
JESD-609 code	e3	e3
length	10 mm	10 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Number of functions	1	1
Number of terminals	52	52
Actual output times	13	13
Maximum operating temperature	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	LQFP
Package shape	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	260	260
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	1.6 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	MATTE TIN	MATTE TIN
Terminal form	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	10 mm	10 mm
Base Number Matches	1	1

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