TS68EN360MAB/C33L datasheet, PDF

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TS68EN360MAB/C33L: DescriptionRISC Microprocessor, CMOS, CQFP240, CAVITY DOWN, CERQUAD-240; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，82 Pages; Manufacturere2v technologies

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TS68EN360MAB/C33L Overview

RISC Microprocessor, CMOS, CQFP240, CAVITY DOWN, CERQUAD-240

TS68EN360MAB/C33L Parametric

Parameter Name	Attribute value
Parts packaging code	QFP
package instruction	CAVITY DOWN, CERQUAD-240
Contacts	240
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
JESD-30 code	S-GQFP-G240
length	31.305 mm
Number of terminals	240
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	FQFP
Package shape	SQUARE
Package form	FLATPACK, FINE PITCH
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum seat height	4.15 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	31.305 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

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Features

•

CPU32+ Processor (4.5 MIPS at 25 MHz)

– 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32)

– Background Debug Mode

– Byte-misaligned Addressing

Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

Up to 32 Address Lines (At Least 28 Always Available)

Complete Static Design (0 - 25 MHz Operation)

Slave Mode to Disable CPU32+ (Allows Use with External Processors)

– Multiple QUICCs Can Share One System Bus (One Master)

– TS68040 Companion Mode Allows QUICC to be a TS68040 Companion Chip and

Intelligent Peripheral (22 MIPS at 25 MHz)

– Peripheral Device of TSPC603e (see DC415/D note)

Four General-purpose Timers

– Superset of MC68302 Timers

– Four 16-bit Timers or Two 32-bit Timers

– Gate Mode Can Enable/Disable Counting

Two Independent DMAs (IDMAs)

System Integration Module (SIM60)

Communications Processor Module (CPM)

Four Baud Rate Generators

Four SCCs (Ethernet/IEEE 802.3 Optional on SCC1-Full 10 Mbps Support)

Two SMC

= +5V ± 5%

max

= 25 MHz and 33 MHz

Military Temperature Range: -55°C < T

< +125°C

= 1.4 W at 25 MHz; 5.25V

2 W at 33 MHz; 5.25V

•

32-bit Quad

Integrated

Communication

Controller

TS68EN360

Description

The TS68EN360 QUad Integrated Communication Controller (QUICC

™

) is a versatile

one-chip integrated microprocessor and peripheral combination that can be used in a

variety of controller applications. It particularly excels in communications activities.

The QUICC (pronounced “quick”) can be described as a next-generation TS68302

with higher performance in all areas of device operation, increased flexibility, major

extensions in capability, and higher integration. The term “quad” comes from the fact

that there are four serial communications controllers (SCCs) on the device; however,

there are actually seven serial channels: four SCCs, two serial management control-

lers (SMCs), and one serial peripheral interface (SPI).

Screening/Quality

This product is manufactured in full compliance with:

•

MIL-STD-883 (class B)

QML (class Q)

or according to Atmel standards

Rev. 2113A–HIREL–03/02

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