a
FEATURES
+5 V, 5 V Power Supplies
Ultralow Power Dissipation (<0.5
Low Leakage (<100 pA)
Low On Resistance (<50 )
Fast Switching Times
Low Charge Injection
TTL/CMOS Compatible
TSSOP Package
W)
LC
2
MOS
Precision 5 V Quad SPST Switches
ADG661/ADG662/ADG663
FUNCTIONAL BLOCK DIAGRAM
S1
IN1
D1
S2
IN2
IN2
D2
S3
IN3
D3
S4
IN4
D4
S1
IN1
D1
S2
IN2
D2
S3
D3
S4
IN4
D4
SWITCHES SHOWN FOR A LOGIC "1" INPUT
IN4
D4
D3
S4
IN1
D1
S2
D2
S3
S1
ADG661
IN3
ADG662
APPLICATIONS
Battery Powered Instruments
Single Supply Systems
Remote Powered Equipment
+5 V Supply Systems
Computer Peripherals such as Disk Drives
Precision Instrumentation
Audio and Video Switching
Automatic Test Equipment
Precision Data Acquisition
Sample Hold Systems
Communication Systems
ADG663
IN3
GENERAL DESCRIPTION
The ADG661, ADG662 and ADG663 are monolithic CMOS
devices comprising four independently selectable switches.
These switches feature low, well-controlled on resistance and
wide analog signal range, making them ideal for precision analog
signal switching.
They are fabricated using Analog Devices' advanced linear
compatible CMOS (LC
2
MOS) process, which offers benefits of
low leakage currents, ultralow power dissipation and low capaci-
tance for fast switching speeds with minimum charge injection.
The on resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed coupled with high
signal bandwidth also make the parts suitable for video signal
switching. CMOS construction ensures ultralow power dissipa-
tion making the parts ideally suited for portable and battery
powered instruments.
The ADG661, ADG662 and ADG663 contain four indepen-
dent SPST switches. The ADG661 and ADG662 differ only in
that the digital control logic is inverted. The ADG661 switches
are turned on with a logic low on the appropriate control input,
while a logic high is required for the ADG662. The ADG663
has two switches with digital control logic similar to that of the
ADG661, while the logic is inverted on the other two switches.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Each switch conducts equally well in both directions when ON
and has an input signal range that extends to the supplies. In the
OFF condition, signal levels up to the supplies are blocked. All
switches exhibit break-before-make switching action for use in
multiplexer applications. Inherent in the design is low charge
injection for minimum transients when switching the digital
inputs.
PRODUCT HIGHLIGHTS
1. +5 V Single Supply Operation
The ADG661, ADG662 and ADG663 offer high perfor-
mance, including low on resistance and wide signal range,
fully specified and guaranteed with
±
5 V and +5 V supply
rails.
2. Ultralow Power Dissipation
CMOS construction ensures ultralow power dissipation.
3. Low R
ON
4. Break-Before-Make Switching
This prevents channel shorting when the switches are config-
ured as a multiplexer.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
ADG661/ADG662/ADG663–SPECIFICATIONS
Dual Supply
(V
Parameter
ANALOG SWITCH
Analog Signal Range
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Drain OFF Leakage I
D
(OFF)
Channel ON Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG663 Only)
Charge Injection
OFF Isolation
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
V
DD
I
DD
I
SS
+4.5/5.5
–4.5/5.5
0.0001
1
0.0001
1
NOTES
1
Temperature ranges are as follows: B Versions, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
DD
1
= +5 V
10%, V
SS
= –5 V
10%, GND = 0 V, unless otherwise noted)
Units
V
Ω
typ
Ω
max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA
typ
µA
max
ns typ
ns max
ns typ
ns max
ns typ
pC typ
dB typ
dB typ
pF typ
pF typ
pF typ
V min/max
V min/max
µA
typ
µA
max
µA
typ
µA
max
V
IN
= V
INL
or V
INH
Test Conditions/Comments
B Versions
+25 C
– 40 C to +85 C
V
DD
to V
SS
30
38
±
0.025
±
0.1
±
0.025
±
0.1
±
0.05
±
0.2
50
V
D
= –3.5 V to +3.5 V, I
S
= –10 mA;
V
DD
= +4.5 V, V
SS
= –4.5 V
V
DD
= +5.5 V, V
SS
= –5.5 V
V
D
=
±
4.5 V, V
S
=
±
4.5 V;
Test Circuit 2
V
D
=
±
4.5 V, V
S
=
±
4.5 V;
Test Circuit 2
V
D
= V
S
=
±
4.5 V;
Test Circuit 3
±
2.5
±
2.5
±
5
2.4
0.8
0.005
±
0.1
150
275
55
120
80
6
70
90
9
9
28
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
=
±
3 V; Test Circuit 4
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
=
±
3 V; Test Circuit 4
R
L
= 300
Ω,
C
L
= 35 pF;
V
S1
= V
S2
= +3 V; Test Circuit 5
V
S
= 0 V, R
S
= 0
Ω,
C
L
= 10 nF;
Test Circuit 6
R
L
= 50
Ω,
C
L
= 5 pF, f = 1 MHz;
Test Circuit 7
R
L
= 50
Ω,
C
L
= 5 pF, f = 1 MHz;
Test Circuit 8
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= +5.5 V, V
SS
= –5.5 V
Digital Inputs = 0 V or 5 V
–2–
REV. 0
ADG661/ADG662/ADG663
Single Supply
(V
Parameter
ANALOG SWITCH
Analog Signal Range
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Drain OFF Leakage I
D
(OFF)
Channel ON Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG663 Only)
Charge Injection
OFF Isolation
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
V
DD
I
DD
DD
= +5 V
10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted)
B Versions
+25 C
– 40 C to +85 C
0 V to V
DD
45
68
±
0.025
±
0.1
±
0.025
±
0.1
±
0.05
±
0.2
75
Units
V
Ω
typ
Ω
max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA
typ
µA
max
ns typ
ns max
ns typ
ns max
ns typ
pC typ
dB typ
dB typ
pF typ
pF typ
pF typ
+4.5/5.5
0.0001
1
V min/max
µA
typ
µA
max
V
IN
= V
INL
or V
INH
Test Conditions/Comments
V
D
= 0 V to +3.5 V, I
S
= –10 mA;
V
DD
= +4.5 V
V
DD
= +5.5 V
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
Test Circuit 2
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
Test Circuit 2
V
D
= V
S
= +4.5 V/+1 V;
Test Circuit 3
±
2.5
±
2.5
±
5
2.4
0.8
0.005
±
0.1
250
400
45
100
140
12
70
90
9
9
28
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +2 V; Test Circuit 4
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +2 V; Test Circuit 4
R
L
= 300
Ω,
C
L
= 35 pF;
V
S1
= V
S2
= +2 V; Test Circuit 5
V
S
= 0 V, R
S
= 0
Ω,
C
L
= 10 nF;
Test Circuit 6
R
L
= 50
Ω,
C
L
= 5 pF, f = 1 MHz;
Test Circuit 7
R
L
= 50
Ω,
C
L
= 5 pF, f = 1 MHz;
Test Circuit 8
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= +5.5 V
Digital Inputs = 0 V or 5 V
NOTES
1
Temperature ranges are as follows: B Versions, –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
–3–
ADG661/ADG662/ADG663
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
Analog, Digital Inputs
2
. . . . . . . . . . . V
SS
–2 V to V
DD
+2 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . 35°C/W
Lead Temperature, Soldering
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
Model
ADG661BRU
ADG662BRU
ADG663BRU
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package
Description
16-Lead TSSOP
16-Lead TSSOP
16-Lead TSSOP
Package
Option
RU-16
RU-16
RU-16
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG661/ADG662/ADG663 features proprietary ESD protection circuitry, per-
manent damage may occur on devices subjected to high energy electrostatic discharges. There-
fore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. 0
ADG661/ADG662/ADG663
PIN CONFIGURATION
IN1
1
D1
2
S1
3
V
SS 4
GND
5
16
15
TERMINOLOGY
IN2
D2
S2
V
DD
NC
V
DD
V
SS
ADG661
ADG662
ADG663
14
13
12
TOP VIEW
S4
6
(Not to Scale)
11
S3
D4
7
IN4
8
10
9
D3
IN3
NC = NO CONNECT
Table I. Truth Table (ADG661/ADG662)
ADG661 In
0
1
ADG662 In
1
0
Switch Condition
ON
OFF
GND
S
D
IN
R
ON
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
t
ON
t
OFF
t
D
Table II. Truth Table (ADG663)
Logic
0
1
Switch 1, 4
OFF
ON
Switch 2, 3
ON
OFF
Crosstalk
Off Isolation
Charge
Injection
Most positive power supply potential.
Most negative power supply potential in
dual supplies. In single supply applications,
it may be connected to GND.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Ohmic resistance between D and S.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D, S.
“OFF” Switch Source Capacitance.
“OFF” Switch Drain Capacitance.
“ON” Switch Capacitance.
Delay between applying the digital control
input and the output switching on.
Delay between applying the digital control
input and the output switching off.
“OFF” time or “ON” time measured between
the 90% points of both switches, when
switching from one address state to another.
A measure of unwanted signal which is
coupled through from one channel to another
as a result of parasitic capacitance.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred
from the digital input to analog output during
switching.
REV. 0
–5–
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