PI74FCT162H543DTVX datasheet, PDF

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PI74FCT162H543DTVX: DescriptionRegistered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56; Categorylogic logic; File Size75KB，7 Pages; ManufacturerPericom Semiconductor Corporation (Diodes Incorporated); Websitehttps://www.diodes.com/

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PI74FCT162H543DTVX Overview

Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56

PI74FCT162H543DTVX Parametric

Parameter Name	Attribute value
Parts packaging code	SSOP
package instruction	SSOP,
Contacts	56
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	BUS HOLD INPUTS ELIMINATE THE NEED FOR EXTERNAL PULLUP RESISTORS
series	FCT
JESD-30 code	R-PDSO-G56
JESD-609 code	e0
length	18.415 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
propagation delay (tpd)	5 ns
Certification status	Not Qualified
Maximum seat height	2.74 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
width	7.5 mm
Base Number Matches	1

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PI74FCT16543T

PI74FCT162543T

PI74FCT162H543T

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321

Fast CMOS 16-Bit

Latched Transceivers

Product Features:

Common Features:

• PI74FCT16543T, PI74FCT162543T and PI74FCT162H543T

are high-speed,

low power devices with high current drive.

• V

= 5V ±10%

• Hysteresis on all inputs

• Packages available:

– 56-pin 240 mil wide plastic TSSOP (A)

– 56-pin 300 mil wide plastic SSOP (V)

PI74FCT16543T Features:

• High output drive: I

= –32 mA; I

= 64 mA

• Power off disable outputs permit “live insertion”

• Typical V

OLP

(Output Ground Bounce) < 1.0V

at V

= 5V, T

= 25°C

PI74FCT162543T Features:

• Balanced output drivers: ±24 mA

• Reduced system switching noise

• Typical V

OLP

(Output Ground Bounce) < 0.6V

at V

= 5V, T

= 25°C

PI74FCT162H543T Features:

•

Bus Hold retains last active state during 3-state

• Eliminates the need for external pull-up resistors

Product Description:

Pericom Semiconductor’s PI74FCT series of logic circuits are pro-

duced in the Company’s advanced 0.6 micron CMOS technology,

achieving industry leading speed grades.

ThePI74FCT16543T,PI74FCT162543TandPI74FCT162H543T are 16-

bit latched transceivers organized with two sets of eight

D-type latches with separate input and output controls for each set.

For data flow from A to B, for example, the A-to-B Enable

(xCEAB) input must be LOW in order to enter data from xAx or to

take data from xBx, as indicated in the Truth Table. With xCEAB

LOW, a LOW signal makes the A-to-B latches transparent; a

subsequent LOW-to-HIGH transition of the xLEAB signal puts the

A latches in the storage mode and their outputs no longer change the

A inputs. With xCEAB and xOEAB both LOW, the 3-state B output

buffers are active and reflect the data present at the output of the A

latches. Control of data from B to A is similar, but uses the xCEBA,

xLEBA, and xOEBA inputs.

The PI74FCT16543T output buffers are designed with a Power-Off

disable allowing “live insertion”of boards when used as backplane

drivers.

The PI74FCT162543T has ±24 mA balanced output drivers. It is

designed with current limiting resistors at its outputs to control the

output edge rate resulting in lower ground bounce and undershoot.

This eliminates the need for external terminating resistors for most

interface applications.

The PI74FCT162H543T has “Bus Hold” which retains the input’s

last state whenever the input goes to high-impedance preventing

“floating” inputs and eliminating the need for pull-up/down

resistors.

OEBA

Logic Block Diagram

OEBA

CEBA

LEBA

OEAB

LEBA

OEAB

CEAB

LEAB

TO 7 OTHER CHANNELS

PS2038B

01/10/01

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